3D Integration

MAGAZINE



3D INTEGRATION ARTICLES



Semiconductor experts chart chip industry's future direction beyond the "Moore's Law" horizon

04/20/2016  Program unveiled for 2016 Symposia on VLSI Technology & Circuits – includes short courses, focus sessions, and panel discussions on "Inflections for a Smart Society" theme.

Sandia National Laboratories licenses ZiBond and DBI technologies

04/19/2016  Invensas Corporation, a wholly owned subsidiary of Tessera Technologies, Inc., announced today that Sandia National Laboratories signed a new license agreement for ZiBond and Direct Bond Interconnect (DBI) technologies.

The advanced packaging industry has reached its zenith

04/14/2016  To overcome the current market and technology constraints taking place today within the semiconductor industry, new advanced packaging technologies have been developed by industrial companies.

Leti extends collaboration with Qualcomm on CoolCube 3D integration technology

04/12/2016  Leti, an institute of CEA Tech, today announced the continuation of its collaboration with Qualcomm Technologies, Inc., a subsidiary of Qualcomm Incorporated, to develop CoolCube.

Flip chip technology market worth $31.27B by 2022

04/08/2016  The flip chip technology market is driven by factors such as increasing demand for miniaturization and high performance in electronic devices, and strong penetration in consumer electronics sector.

Rudolph adds high-speed 3D metrology to the NSX Series for advanced packaging process control

04/07/2016  Rudolph Technologies, Inc. today announced the availability of new, high-speed 3D metrology on its flagship NSX Series, a highly-flexible inspection and measurement platform for process development and control of die-level interconnects.

Texas Instruments names Devan Iyer Vice President

03/29/2016  Texas Instruments Incorporated (TI) announced that Devan Iyer has been elected vice president of the company.

How finFETs ended the service contract of silicide process

03/25/2016  A look into how the silicide process has evolved over the years, trying to cope with the progress in scaling technology and why it could no longer be of service to finFET devices.

Amkor announces shipment of 700M RF and advanced SiP modules

03/25/2016  Amkor Technology Inc. announced it has shipped 700 million RF and front-end advanced system-in-package (SiP) modules for mobile device applications.

ARM and TSMC announce multi-year agreement to collaborate on 7nm FinFET process

03/16/2016  ARM and TSMC announced a multi-year agreement to collaborate on a 7nm FinFET process technology which includes a design solution for future low-power, high-performance compute SoCs.

BiTS: The ever-shrinking package underscores emerging challenges and solutions

02/25/2016  What’s the single area that is being most disrupted by emergent technologies like the Internet of Things (or the Internet of Vehicles) and Silicon Photonics? We think it’s packaging.

New industry realities and opportunities at semiconductor manufacturing conference

02/23/2016  The annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC 2016) will be held May 16-19 in Saratoga Springs, New York.

UW scientists create ultrathin semiconductor heterostructures for new technologies

02/12/2016  University of Washington scientists have successfully combined two different ultra thin semiconductors to make a new two-dimensional heterostructure with potential uses in clean energy and optically-active electronics.

MORE 3D-INTEGRATION ARTICLES

TWITTER


WEBCASTS



Advanced Packaging: A Changing Landscape Rife with Opportunities

May 10, 2016 at 1 PM ET / Sponsored by Brewer Science

Die stacking enables better chip performance in a small form factor, meeting the needs of smartphones, tablets, and other advanced devices. Through-silicon vias are moving into volume packaging production, but problems with reliability, cost, and scaling remain. The supply chain also must adjust to this “mid” step between front- and back-end chip production. This webcast will explore the wafer thinning, bonding, TSV formation and other critical process steps necessary to enable 3D integration.

Sponsored By:
Trends in MEMS

May 11, 2016 at 12 PM ET / Sponsored by Boston Semi Equipment

MEMS have quite different process and material requirements compared to mainstream microprocessor and memory types of devices. This webcast will explore the latest trends in MEMS devices – including sensor fusion, biosensors, energy harvesting – new manufacturing challenges and potential equipment and materials solutions to those challenges.

Sponsored By:
Fan-Out Wafer Level Packaging

May 2016 (Date and time TBD) / Sponsored by Zeta Instruments

Wafer level packaging (WLP) using fan-out technology is an attractive platform for achieving low-cost low-profile package solutions for smart-phones and tablets, which require cost-effective, high-density interconnects in small form-factor packaging. Assembled directly on a silicon wafer, the approach is unconstrained by die size, providing the design flexibility to accommodate an unlimited number of interconnects between the package and the application board for maximum connection density, finer line/spacing, improved electrical and thermal performance and small package dimensions to meet the relentless form factor requirements and performance demands of the mobile market. In this webcast, industry experts will explain the FOWLP process, discuss recent advances and forecast future trends.

Sponsored By:
More Webcasts

TECHNOLOGY PAPERS



Protecting Electronics with Parylene

This whitepaper provides a comprehensive overview of parylene conformal coating, advantages of parylene, and applications for parylene to protect electronic devices. As technology continues to advance, devices will encounter rugged environments and it is vital that they are properly protected. Parylene conformal coating is one way that manufacturers are giving their devices a higher level of protection, along with increasing the overall quality of their products. Parylene conformal coating applications for Electronics include: · I/O & PCI Modules · Power Converters and Supplies · Backplanes · Other Embedded Computing applications · Other specialty electronics and assemblies April 26, 2016
Sponsored by Diamond-MT

NMT: A Novel Technology for In-Line Ultra-Thin Film Measurements

XwinSys identified the semiconductors recent market trends and developed a novel XRF technology, named NMT: Noise-reduced Multilayer Thin-film measurement. This innovative approach can be used for in-line inspection and metrology features, to accurately and precisely analyze single and multi-layered elements in ultra-thin films. NMT novel technology can be utilized for in-line applications ranging from localized ultra-thin film stacks to the inspection of 3D localized features to the analysis of defects involving geometries, voids and material elements. February 23, 2016
Sponsored by XwinSys Technology Development Ltd.

Adhesives for Electronic Applications

Master Bond custom formulates epoxy adhesives, sealants, coatings, potting and encapsulation compounds to meet the rigorous needs of the electronic industry. We are a leading manufacturer of conformal coatings, glob tops, flip chip underfills, and die attach for printed circuit boards, semiconductors, microelectronics, and more. Browse our catalog to find out more.January 05, 2016
Sponsored by Master Bond, Inc.,

More Technology Papers

EVENTS



SID Display Week 2016
San Francisco, CA
http://www.displayweek.org
May 22, 2016 - May 27, 2016
Design Automation Conference
Austin, TX
https://dac.com
June 05, 2016 - June 09, 2016
The ConFab
Las Vegas, NV
http://theconfab.com
June 12, 2016 - July 15, 2016
SEMICON West 2016
San Francisco, CA
http://www.semiconwest.org
July 12, 2016 - July 14, 2016

VIDEOS