3D Integration

3D INTEGRATION ARTICLES



Surface matters: Huge reduction of heat conduction observed in flat silicon channels

04/23/2015  A paper published in ACS Nano describes how the nanometre-scale topology and the chemical composition of the surface control the thermal conductivity of ultrathin silicon membranes.

Synopsys' modeling of 10nm parasitic variation effects ratified by open-source standards board

04/21/2015  Synopsys, Inc. today announced new extensions to its open-source Interconnect Technology Format (ITF) which enable modeling of complex device and interconnect parasitic effects at the advanced 10-nanometer (nm) process node.

KLA-Tencor introduces new portfolio for advanced semiconductor packaging

04/16/2015  Today, KLA-Tencor Corporation announced two new systems that support advanced semiconductor packaging technologies: CIRCL-AP and ICOS T830.

A*STAR's IME and partners to enable low cost packaging technology for system scaling within smart devices

04/15/2015  A*STAR’s Institute of Microelectronics (IME), together with industry partners, have formed a High-Density Fan-Out Wafer Level Packaging (FOWLP) consortium to extend FOWLP capabilities for applications in devices such as smart phones, tablets, navigation tools and gaming consoles.

ClassOne enters ECD lab partnership with Shanghai Sinyang

04/14/2015  Semiconductor equipment manufacturer ClassOne Technology announced today that it has signed a joint electrochemical deposition (ECD) applications lab agreement with Shanghai Sinyang Semiconductor Materials Co., Ltd.

Duke University research advances testing of 3D integrated circuits for cost-effective development of electronics

04/14/2015  Duke University researchers are working to advance the tools and methodologies used to test 3D integrated circuits (ICs), which promise to help ensure the ongoing development of higher performance, lower power semiconductor chips.

Consider packaging requirements at the beginning, not the end, of the design cycle

04/02/2015  Consider these eight issues where the packaging team should be closely involved with the circuit design team.

Imaging tomorrow’s components, acoustically

04/02/2015  Packages are changing. Acoustic methods provide a way to image and analyze them.

Supplier Hub answers the needs of a changing semiconductor industry

04/02/2015  Supplier Hub answers the needs of a changing semiconductor industry.

Micron and Intel unveil new 3D NAND flash memory

03/26/2015  Micron Technology, Inc. and Intel Corporation today revealed the availability of their 3D NAND technology, the world’s highest-density flash memory.

Optoelectronics, sensors/actuators, and discretes growth accelerates

03/25/2015  After two years of sluggishness, O-S-D sales strengthen with an improving economy and a boost from new applications, says new 2015 report.

NXP-Freescale merger to result in world's eighth largest chip maker

03/18/2015  The recent acquisition of Freescale Semiconductor by NXP Semiconductors would catapult the merged entity into the world’s eighth-largest chipmaker, positioning the newly minted giant for an even more formidable presence in key industrial sectors, according to IHS.

Ziptronix licenses DBI hybrid bonding patents to Sony for advanced image sensor applications

03/18/2015  Ziptronix Inc., a developer and provider of patented, low-temperature direct bonding technology for 3D integration, today announced a patent licensing agreement with Sony Corporation for application in advanced image sensors.

XMC ships over 100 million units of backside illumination CMOS image sensors

03/12/2015  XMC, a 300mm semiconductor manufacturing company, today announces it has shipped over 100 million Backside Illumination (BSI) CMOS Image Sensor (CIS) units.

11 IC product categories to exceed total IC market growth in 2015

03/12/2015  IC Insights’ March Update to the 2015 McClean Report (being released later this month) refreshes the forecasts for 33 major IC product categories through 2019.

IRT Nanoelec and CMP team up to offer world’s first service for post-process 3D technologies on multi-project-wafer

03/05/2015  IRT Nanoelec, an R&D consortium focused on ICT using micro- and nanoelectronics, and CMP, which provides prototyping and low-volume production of ICs and MEMS, are launching a platform for multi-project-wafer, post-process 3D integration (3D-MPW).

Embedded die in substrate: Challenges are still ahead

03/03/2015  Embedded die in substrate: what are the next steps for the growth?

Freescale and NXP agree to $40 Billion merger

03/03/2015  Chipmaker NXP Semiconductors NV announced Sunday night that it has agreed to buy Freescale Semiconductor Ltd for $11.8 billion and merge business operations.

Imec demonstrates compact wavelength-division multiplexing CMOS silicon photonics transceiver

02/26/2015  This week, at the 2015 International Solid State Circuits Conference (ISSCC), imec, in collaboration with Tyndall National Institute, the University of Leuven (KULeuven) and the Ghent University, demonstrated a 4x20Gb/s wavelength division multiplexing (WDM) hybrid CMOS silicon photonics transceive

Applied Materials unveils breakthrough e-beam metrology tool for finFET transistors and 3D NAND devices

02/23/2015  At the SPIE Advanced Lithography conference in San Jose, Calif., Applied Materials, Inc., today announced the industry's first in-line 3D CD SEM metrology tool for solving the challenges of measuring the high aspect ratio and complex features of 3D NAND and FinFET devices.




HEADLINES

FINANCIALS



TECHNOLOGY PAPERS



ASIC Design Made Cost Effective with Low Cost Tools and Masks

For smaller projects or companies with modest design budgets, ASIC design is becoming a viable option due to low cost design tools and easy access to flexible, mature IC processes. This is especially compelling for developing mixed-signal ASICs for cost-sensitive sensor applications for the Internet of things (IoT). This paper discusses how costs and risks can be reduced using multi-project wafer services, coupled with affordable design tools for developing mixed-signal ASICs. April 13, 2015
Sponsored by Mentor Graphics

High-Performance Analog and RF Circuit Simulation

The research group led by Professor Peter Kinget at the Columbia University Integrated Systems Laboratory (CISL) focuses on cutting edge analog and RF circuit design using digital nanoscale CMOS processes. Key challenges in the design of these circuits include block-level characterization and full-circuit verification. This paper highlights these verification challenges by discussing the results of a 2.2 GHz PLL LC-VCO, a 12-bit pipeline ADC, and an ultra-wideband transceiver.March 13, 2015
Sponsored by Mentor Graphics

How to Use Imaging Colorimeters for FPD Automated Visual Inspection

The use of imaging colorimeter systems and analytical software to assess display brightness and color uniformity, contrast, and to identify defects in FPDs is well established. A fundamental difference between imaging colorimetry and traditional machine vision is imaging colorimetry's accuracy in matching human visual perception for light and color uniformity. This white paper describes how imaging colorimetry can be used in a fully-automated testing system to identify and quantify defects in high-speed, high-volume production environments.February 27, 2015
Sponsored by Radiant Vision Systems

More Technology Papers

WEBCASTS



Trends in Materials: The Smartphone Driver

Thursday, April 30, 2015 at 1:00 p.m. EST

To understand 3-D FinFET doping and high mobility channel material, this talk will first review the current doping and Fin/channel mobility enhancement techniques used for 22nm FinFET production by Intel for both high performance logic and SOC devices and the changes they made for their 2nd generation 14nm FinFET.

Sponsored By:
MEMS

May 2015 (Date and time TBD)

MEMS have quite different process and material requirements compared to mainstream microprocessor and memory types of devices. This webcast will explore the latest trends in MEMS devices – including sensor fusion, biosensors, energy harvesting – new manufacturing challenges and potential equipment and materials solutions to those challenges.

Sponsored By:
Interconnects

June 2015 (Date and time TBD)

This webcast will examine the state-of-the-art in conductors and dielectrics, -- including contacts and Metal1 through global level -- pre-metal dielectrics, associated planarization, necessary etch, strip and cleans, embedded passives, global and intermediate TSVs for 3D, as well as reliability, system, and performance issues.

Sponsored By:
More Webcasts

VIDEOS



EVENTS



ASMC 2015
Saratoga Springs, NY
http://www.semi.org/en/asmc2015
May 03, 2015 - May 06, 2015
The ConFab
Las Vegas, Nevada
http://www.theconfab.com
May 19, 2015 - May 22, 2015
65th Annual ECTC
San Diego, CA
http://www.ectc.net
May 26, 2015 - May 29, 2015
SID Display Week 2015
San Jose, California
http://www.displayweek.org
May 31, 2015 - June 05, 2015
Design Automation Conference (DAC)
San Francisco, CA
https://dac.com
June 07, 2015 - June 11, 2015