3D Integration

3D INTEGRATION ARTICLES



Rudolph introduces new acoustic metrology and defect inspection technology

09/18/2014  Rudolph Technologies has introduced its new SONUS Technology for measuring thick films and film stacks used in copper pillar bumps and for detecting defects, such as voids, in through silicon vias (TSVs).

Global shutter image sensors

09/09/2014  Different GS pixel architectures and technologies are presented and performances compared.

Contour Semiconductor awarded three new U.S. patents

09/04/2014  Contour Semiconductor, Inc., a developer of non-volatile memory technologies, today announced it has been awarded three new patents to back its Diode Transistor Memory (DTM) technology, the world's lowest production-cost, non-volatile memory technology.

SEMICON Taiwan 2014 opens today with spotlight on 3D-IC, sustainable manufacturing, and MEMS

09/03/2014  Taiwanese chipmakers, LED manufacturers, and Outsourced Semiconductor Assembly and Test (OSAT) firms will spend firm nearly $24 billion in the next two years on equipment and materials, powering excitement for SEMICON Taiwan 2014, which opened today in Taipei.

Intel releases new packaging, test technologies for 14nm foundries

08/27/2014  Intel Corporation today announced two new technologies for Intel Custom Foundry customers that need cost-effective advanced packaging and test technologies.

New ClassOne electroplater a "sellout" at SEMICON West

08/25/2014  When ClassOne Technology introduced its new Solstice electroplating systems at SEMICON West last month they didn’t expect to actually sell their first production unit off the show floor, but that’s what happened.

MEMSIC introduces the world's first monolithic and wafer level packaged 3D-axis accelerometer

08/15/2014  MEMSIC, Inc., a MEMS sensing solution provider, announced today the availability of its MXC400xXC, the world's first monolithic 3D accelerometer, and also the first 3D accelerometer to utilize WLP technology.

Si2 announces new director of 3DIC programs

08/14/2014  The Silicon Integration Initiative (Si2), a global semiconductor standards consortium, announced today that Herb Reiter is joining the team of professionals in the role of Director, 3D IC Programs.

Materials matter — Enabling the future of IC fabrication and packaging

07/31/2014  The SEMI Strategic Materials Conference, held September 30–October 1 in Santa Clara, Calif., will examine the drivers for new materials and how they impact material suppliers and the value chain they serve.

Fusion bonding for next-generation 3D-ICs

07/24/2014  Recent developments in wafer bonding technology have demonstrated the ability to achieve improved bond alignment accuracy.

A*STAR and industry partners form S$200M semiconductor R&D joint labs

07/24/2014  Four joint laboratories, representing a commitment of S$200m between private and public sectors, were launched today between A*STAR's Institute of Microelectronics (IME), and its 10 industry partners.

EVG clears key barriers to 3DIC/TSV HVM with fusion wafer bonding solution

06/30/2014  EV Group today unveiled the GEMINI FB XT—its next-generation fusion wafer bonding platform, which combines several performance breakthroughs to move the semiconductor industry closer to the goal of high-volume manufacturing (HVM) of 3D-ICs with through-silicon vias (TSVs).

ConFab panelists discuss optimizing R&D in the changing semi landscape

06/24/2014  Overheard @The ConFab: “I feel the best I’ve felt about semi since 2009.” –Mike Noonen, Silicon Catalyst

SPTS and CEA-Leti/Nanoelec collaborate on 3D-TSV

06/24/2014  SPTS Technologies, a manufacturer of etch, deposition and thermal processing equipment for the semiconductor industry, today announced that it has signed an agreement with CEA-Leti in Grenoble, France, to develop 3D-TSV technologies.

Micron collaborates with Intel on on-package memory solution, leveraging 3D memory technology

06/23/2014  Micron Technology, Inc., a provider of advanced semiconductor solutions, today announced an ongoing collaboration with Intel to deliver an on-package memory solution for Intel's next-generation Xeon Phi processor, codenamed Knights Landing.

GS Nanotech pioneers 3D packaging technology in Russia

06/19/2014  GS Nanotech, microelectronics products development and manufacture center, plans to launch mass assembly of 3D stacked TSV (through-silicon via) microcircuits in next few years.

IEEE Packaging Awards handed out at 2014 ECTC

06/05/2014  The 2014 Electronic Component Technology Conference (ECTC) took place last week in Orlando Florida.

Applied Materials enables cost-effective vertical integration of 3D chips

05/28/2014  Applied Materials, Inc. today introduced the Endura Ventura PVD system that helps customers reduce the cost of fabricating smaller, lower power, high-performance integrated 3D chips.

Ziptronix and EV Group demonstrate submicron accuracies for wafer-to-wafer hybrid bonding

05/27/2014  ­ Ziptronix Inc. and EV Group today announced they have successfully achieved submicron post-bond alignment accuracy on customer-provided 300mm DRAM wafers.

SPTS Technologies announces the Omega Rapier XE System for 300mm wafer silicon etch processing

05/22/2014  SPTS Technologies, a supplier of advanced wafer processing solutions for the global semiconductor industry and related markets, today announced the launch of its Rapier XE system for 300mm wafer silicon etching.




FINANCIALS



TECHNOLOGY PAPERS



Conformal Coatings for Reliable Electronic Assemblies

Modern electronics have become part of our daily lives and the sophisticated electronic circuitry at the heart of these devices and systems must be reliable. Conformal coatings act as a barrier between the electronics and the environment, protecting the areas they cover while strengthening delicate components and traces. Find out more about how conformal coatings enhance the reliability and longevity of electronic printed circuit boards.April 24, 2014
Sponsored by Master Bond, Inc.,

The Next Step in Diagnosis Resolution Improvement

Root Cause Deconvolution (RCD), a statistical enhancement technology recently made available in Mentor Graphics’ Tessent Diagnosis and YieldInsight products, is the next step in diagnosis resolution enhancement. It works by analyzing multiple layout-aware diagnosis reports together to identify the underlying defect distribution (root cause distribution) that is most likely to explain this set of diagnosis results. The results are then back- annotated to the individual diagnosis suspects.April 24, 2014
Sponsored by Mentor Graphics

UV LED Curing for the Electronics Industry

This paper provides an introduction to UV LED curing and the many benefits UV LED curing provides for bonding and coating applications in the electronics industry. Product manufacturers, machine builders, and chemistry formulators will gain an understanding of the benefits and how to apply UV LED curing in manufacturing processes. Included are specific examples of how manufacturers are using UV LED to make touch screens, mobile phones, micro speakers, and hard disk drives.April 03, 2014
Sponsored by Phoseon Technology

More Technology Papers

WEBCASTS



Metrology

September 2014 (date and time TBD)

Continued scaling and more complex device structures, including FinFETs and 3D stacking, are creating new challenges in metrology and inspection. Smaller defects must be detected and analyzed on an increasingly diverse set of materials. Chip makers are looking for better wafer edge inspection techniques, higher resolution metrology tools, 450mm-capability and new compositional analysis solutions.

Sponsored By:
Advanced Packaging

Sept. 2014 (Date and time TBD)

Back-end packaging is increasingly important to semiconductor device form factor, thermal and power performance, and costs. Compounded by the demand for lead-free processing and the soaring cost of gold, the industry is developing new approaches to packaging, including redistribution layers (RDL), through silicon vias (TSV), copper pillars, wafer-level packaging (WLP) and copper wire bonding. Experts will discuss these and other approaches in this webcast.

Sponsored By:

Interconnects

Oct. 2014 (Date and time TBD)

This webcast will examine the state-of-the-art in conductors and dielectrics, -- including contacts and Metal1 through global level -- pre-metal dielectrics, associated planarization, necessary etch, strip and cleans, embedded passives, global and intermediate TSVs for 3D, as well as reliability, system, and performance issues.

Sponsored By:

More Webcasts

VIDEOS



EVENTS



APC (Advanced Process Control) Conference XXVI 2014
Ann Arbor, Michigan
http://www.apcconference.com/
September 29, 2014 - October 01, 2014
Strategic Materials Conference
Santa Clara, CA
http://www.semi.org/node/41386
September 30, 2014 - October 01, 2014
SEMICON Europa
Grenoble, France
http://www.semiconeuropa.org
October 07, 2014 - October 09, 2014
MEMS Executive Congress US 2014
Scottsdale, AZ
http://us2014.memscongress.com
November 05, 2014 - November 07, 2014