Cleanroom Requirement Debated for Chip-on-Board Assembly

Cleanroom Requirement Debated for Chip-on-Board Assembly

BY Shelia Galatowitsh

Chip-on-board/direct-chip-attach (COB/DCA) assembly is most likely to be performed in a Class 10,000 cleanroom or better, report users, experts and vendors, but there is no hard evidence that suggests a cleanroom environment is absolutely necessary. Some experts, especially those from the surface mount industry, believe a cleanroom is an unnecessary expense for COB/DCA. The question may not be settled definitively until studies have been performed investigating COB/DCA failure modes attributable to particulate and organic surface contamination.

In COB assembly, bare die are mounted directly on the printed circuit board. A fine, high purity wire bond connects a pad on the board to a pad on top of the die. DCA turns the chip upside down and attaches it directly to the board, requiring an underfill material between the die and the board.

Those contending that a cleanroom is necessary come primarily from the hybrid multichip module (MCM) industry, and it is these two groups, surface mount vs. hybrid MCM, that are debating the issue. The hybrid MCM industry is accustomed to working in a cleanroom with bare semiconductor die, while the surface mount industry uses processes and equipment that are unsuitable for cleanroom environments, believing the absence of a cleanroom does not negatively impact the product.

Dr. Harry Charles, assistant department head for engineering at the Applied Physics Laboratory of John Hopkins University and past president of the International Society for Hybrid Microelectronics, says that COB/DCA should be assembled like any hybrid or MCM operation. “Chip-on-board is not quite an extension of surface mount. We know that if there is debris on the pad, you can`t bond. A dust particle will make a non-stick. Keeping things as clean as possible is the way to go–keeping things free of organics and keeping particulates off.”

Other experts assert that a cleanroom is an unnecessary expense in COB assembly. “It is my opinion that there are many surface mounting assembly factories where you could directly integrate chip-on-board into those processes without the addition of cleanroom technology,” says Ray Rua of RRA Technical Services and Solutions (Grand Rapids, MI), an engineering consulting firm. Rua helped pioneer surface mount technology and has built two dozen factories performing surface mount. “It is my belief you can do that successfully and produce reliable product,” Rua says.

Dr. Chuck Bauer of TechLead Corp. (Evergreen CO), a consulting firm in electronics interconnection, packaging and assembly, says the primary rationale for a cleanroom is the behavioral discipline a cleanroom environment imposes, not to protect the product.

Advanced packaging equipment and materials suppliers report that their COB/DCA customers are working in cleanrooms. Although its dispense and assembly products can go into any environment, all of MRSI`s (Chelmsford, MA) COB customers are using cleanrooms, says sales manager Dan Crowley.

Palomar Products (Carlsbad, CA), an assembly equipment manufacturer, reports that most of its customers are using Class 100,000 or better. “The more generic cleanroom is probably Class 10,000, along the lines of the complex hybrid or MCM,” says National Sales Manager Bradley Benton. Palomar has COB customers in all industries, particularly aerospace. “Are cleanrooms absolutely required? No, but when you are talking about parts-per-million defect rates, then you need to do assembly in a controlled environment,” Benton says. “My suggestion to a company would be to weigh the cost of the cleanroom against the cost and quality of the yield you need to get from the product.”

Larry Sirois, customer applications engineer at Camelot Systems, a dispensing system manufacturer, reports the company`s equipment is used in a broad range of environments from general manufacturing floors up to a Class 10 cleanroom. “Most of our customers are using Class 1000 or Class 10,000 cleanrooms as a rule,” Sirois says, but adds that he has also seen COB/DCA performed in dirtier environments.

Lisa Ryan, product manager for microelectronics liquids at Dexter Electronic Materials (Industry, CA) says that for her customers, the application dictates the environment. “It depends on how sophisticated the product is. If companies are doing quick throw-away consumables such as watches or game boards, they are not doing it in a cleanroom. If they are doing pacemakers, Power PCs or microprocessors–anything where the application is critical–they are,” she says. Less than 20 percent of Dexter`s customers are in Class 1,000 cleanrooms, with the majority working in Class 10,000 rooms. Dexter itself is building a Class 10,000 cleanroom to manufacture its high-end liquid encapsulants.

A cleanroom is the choice COB environment for Valtronic Inc. (Solon, Ohio), a contract manufacturing company assembling printed circuit boards via COB, surface mount or through-hole. The company has been performing COB for eight years in a 1,000-ft2 Class 10,000 cleanroom. Its surface mount assembly is done in a general manufacturing floor environment.

Valtronic`s customers include medical, computer, memory device and communications companies. “We feel that a cleanroom is necessary,” says manufacturing engineer Tom Dottore. “With the small wires, particles on the bond pads could cause problems. The manufacturing floor is not quite clean enough or particle-free. Also, if any fluxes that are airborne from the surface mount assembly, they could cause contamination on top of the die or the bonding wire,” he says.

For wire bonding and other assembly operations, almost all U.S. semiconductor companies are using Class 10,000 to Class 1,000 and better cleanrooms, while the Japanese have often gone as low as Class 100, according to George Harman, a fellow at the National Institute of Standards and Technology, who is writing the second edition of a book on wire bonding.

Papers have been published in conference proceedings and peer review journals addressing the general subject of particulate contamination in chip assembly, including wire bonding, but Harman says he hasn`t discovered any studies specifically related to COB/DCA. “A company that does it dirty may be open to some problems,” Harman says.

In the range of 100-500 parts-per-million defect yield, “a particle or two on a fine pitch bond pad could interfere with bonding. The number of particles in a room can be the basis of such calculations,” Harman says. “In the old days people did it all out in the open with no cleanroom. But if you want very high yield, reliability and fine pitch, you will wire bond it in some kind of cleanroom or at least require protective garments.”

What literature is available has demonstrated that the problem of assembling chips in a non-clean environment is primarily one of long-term reli ability, rather than as-made yield, Harman says. Therefore, particles left on chips can cause corrosion later in the life of the device. They can also cause glob-top covers not to stick to the chip and thus accumulate water at the particle site.

He notes that for low-cost, non-critical devices and boards (such as those used for entertainment products), the operating environment is not likely to be extreme in terms of humidity or temperature, and failures a year or two later will not matter very much. For these products, as Dexter`s Ryan points out, COB assembly in a non-cleanroom environment is sufficient. However, if the boards are to be used for military, automotive or avionics applications, there is a legitimate concern about the reliability issue. In the future, very-fine-pitch-bonding can expect some yield loss (calculated).

Harman lists three references, along with his own comments on the works, that address these problems:

Thomas, R. W., and Calabrese, D. W., “The Identification and Elimination of Human Contamination in the Manufacture of ICs,” 23rd Annual Proc. on Reliability Physics 1985, Orlando, Florida, March 26-28, 1985, pp. 228-234. (Mostly how contaminants show up in packaging of the ICs.)

Lewis, G. L., and Berg, H. M., “Particulates in Assembly: Effect on Device Reliability,” 36th Electronics Components Conference, Seattle, Washington, May 5-7, 1986, pp. 100-106. (Says that in assembly the problem is primarily reliability rather than yield; even removed human particles show corrosion products in the spot, spit is the worst, failing in 85-85 within 40 hours in P-dips–good discussion of particles, cleanroom problems, ratings, etc., at the very least need face masks and clothing protection.)

Sandroff, F.S. and Burnett, W.H., Reliability Qualification Test for Circuit Boards Exposed to Airborne Hygroscopic Dust, Proc 1992 Electronic Components & Technology Conf, San Diego, CA, May 18-20, 1992, pp. 384-388. (Gives good references for general board contamination-after production. Gives resistance vs. rel humidity (on boards) of various chemicals and how they may cause board failure. Not IC related, but board itself.) n

Editor`s Note: The research and reporting on this subject was requested by a CleanRooms reader–John Graves, Senior Staff Engineer, Allied Signal Communications Systems (Baltimore, MD). CleanRooms welcomes inquiries from its readers and will attempt to follow up on all such requests of reasonably broad interest as resources permit. Please send as much background material as possible. Requests should be addressed to: Technical Inquiries Editor, CleanRooms Magazine, 10 Tara Blvd. 5th FL, Nashua, 03062; FAX: 603-891-9200; or sent via our home page at http://www.cleanrooms.com.

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One thought on “Cleanroom Requirement Debated for Chip-on-Board Assembly

  1. edie1978

    “Some experts, especially those from the surface mount industry, believe a cleanroom is an unnecessary expense for COB/DCA”
    I disagree Best regards, Edie

    Reply

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