Charles E. Bauer, Ph.D.
A client recently posed the question, “Can you help us to define the difference between semiconductor packaging and surface mount assemblies?” “It`s obvious,” you say? “Semiconductor packaging deals with bare die and surface mount assembly uses only packaged devices.” But upon further consideration, the problem becomes far more complex and depends greatly on the perspective taken. Technically speaking, where would thick and thin film hybrids belong? And multi-layer ceramics? And how about multi-chip modules (MCMs)? And wafer level chip scale packages (CSPs)? And chip on board (COB) or direct chip attach (DCA) circuit card assemblies? Then there are CSPs on high density interconnect (HDI) printed wiring boards. Regardless of all the acronyms, even a seemingly simple and very objective technical perspective becomes cloudy.
From a business perspective, it`s appropriate to ask, “Who is my customer?” or “What is my product?” A semiconductor fabricator as the customer might indicate that you are in the packaging business while an original equipment manufacturer (OEM) as the customer might identify that you are a surface mount assembler. On the product side, do you supply a finished functional device for incorporation onto modules or boards, or do you supply a board or module for systems-level integration into an end product?
Exploring the technical perspective further, thick and thin film hybrid technologists generally argue that they represent the bridge between packaging and assembly. In fact, in the early 1980s, during the advent of surface mount technology (SMT), many leading developers of surface mount components and assembly techniques came from a hybrid background where small chip capacitors had long been used. Then in the late 1980s, with silicon coverage and density increasing, routing demands accelerated growth in multi-layer ceramics as well as thin film and laminated substrate structures. You could argue that because these folks did not come from a hybrid background, they decided to come up with a new, more marketable description of the technology and called it MCMs!
Today we have CSPs. I doubt many people would contend that the typical lead on chip or substrate based (flex or rigid interposer) CSPs are anything other than packages for use in SMT assembly, but wafer-level CSPs raise a different question. Most, though not all, wafer-level CSPs give the appearance of nothing more than redistributed flip chip die despite purporting not to require underfill to ensure assembled product reliability. On the other hand, all CSPs more readily provide testability than typical bare die and, in combination with HDI substrates, can achieve near MCM densities using assembly technologies more reminiscent of SMT than semiconductor packaging. Flipping to the other side, COB and DCA applications (e.g., early Motorola Star-Tac cellular telephone handsets) clearly integrate technologies typical of semiconductor packaging (chip and wire, and flip chip) into more traditional SMT assembly manufacturing lines.
Certainly, the proliferation of substrate-based packaging throughout the 1990s blurred the technical lines as ball grid array (BGA) and CSP technologies combined with DCA and few chip MCMs to confuse matters. And as progress toward some level of system on a chip continues, even the product differentiation may diffuse. But, from a purely technical perspective, I suggest any argument to be merely specious and mostly a matter of semantics and interpretation.
So who cares? And what`s the answer? Although technically it may not matter significantly, differentiating the concepts of semiconductor packaging and SMT assembly from a business and marketing perspective can be very powerful and provide significant opportunity. This applies to both semiconductor packagers and SMT assemblers, as well as suppliers of materials and equipment for the contractors and OEMs doing the packaging and SMT assembly.
By way of a technical example, semiconductor packaging concerns itself with reliability tests, such as pressure cooker exposure, while the SMT world worries most about thermal fatigue resistance. Although both criteria ultimately impact product reliability, the resultant awareness and perspectives differ greatly.
Understanding customers` wants, needs and expectations holds the answer to the question and the key to business success. How customers perceive themselves, as semiconductor packagers or SMT assemblers, is the answer. Their self-perception determines the culture, preconceptions, filters and assumptions (the total point of view) that underlie their buying and decision making processes.
Finally, to answer this question for your own situation with your customers is easy. Who are their customers – semiconductor houses or OEMs? What trade shows do they attend to find and evaluate the materials and equipment they need – SEMICON or NEPCON, ECTC or SMTA International, IMAPS or APEX, Electronica or Productronica? What magazines do they read – how do they obtain industry information?
Of course, categorizing customers correctly simply facilitates appropriate allocation of advertising and trade show budgets, training and targeting of appropriate sales personnel, and planning of long-term development programs. These efforts will get you in the door, but ultimate success lies in listening to each customer, understanding their specific and unique wants, needs and expectations, and successfully delivering products that meet these requirements.
CHARLES E. BAUER, Ph.D., senior managing director, can be contacted at TechLead Corp., 31321 Island Drive, Evergreen, CO 80439; (303) 674-8202; Fax: (303) 674-6978; E-mail: Chuck.Bauer@TechLead Corp.com.