TSMC joins the X Initiative

May 17, 2004 — The X Initiative today welcomed Taiwan Semiconductor Manufacturing Company Ltd. (TSMC) as the latest member of the semiconductor design-chain consortium. Having verified the 0.13 micron X Architecture design rules with test chips, TSMC is now working with select customers on their circuits to leverage the performance, cost and power advantages of the X Architecture.

With the foundry leveraging its manufacturing facilities to fabricate X Architecture silicon, the innovative chip architecture is one step closer toward broad commercial adoption by the global semiconductor industry.

The X Initiative, a group of leading companies from throughout the semiconductor industry, is chartered with accelerating the availability and fabrication of the X Architecture, a revolutionary interconnect architecture based on the pervasive use of diagonal routing. The X Initiative’s five-year mission is to provide an independent source of education about the X Architecture, to facilitate support and fabrication of the X Architecture through the semiconductor industry design chain, and to survey usage of the X Architecture to track its adoption.

The X Architecture represents a new way of orienting a chip’s microscopic interconnecting wires using diagonal pathways, as well as the traditional right-angle, or “Manhattan,” configuration. By enabling designs with significantly less wire length and fewer vias (the connectors between wiring layers), the X Architecture can provide significant improvements in chip performance, power consumption and cost.

The pre-production phase of the design-to-silicon roadmap for the X Architecture, laid out by the X Initiative in 2002, was completed with the announcement of functional silicon results by an X Initiative member late last year. The focus of the X Initiative’s collaborative design-chain preparation is now to enable broad adoption of the X Architecture for production manufacturing at current (130 nm, 90 nm) nodes and to demonstrate manufacturing scalability into future process nodes. First production chips are expected this year.


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