Wafer-level Microbumping for Flip Chips



The CEA-LETI proposed using anisotropic conductive films (ACFs) for flip chip interconnection in the past, and has developed specific Z-axis ACFs for bumpless interconnection.1,2,3,4 The film consists of a polymer containing structured, fine, conductive metallic inserts terminated by protruding pyramidal tips that enable the native oxide on the aluminum die pad to be passed through. The ACF is interposed between the die and substrate to be connected. Assembly and interconnection are achieved through gluing and thermocompression at low temperature. This Z-axis ACF allows flip chip die without a bumping process on the wafer, and is lead-free. These ACFs have been evaluated at CEA-LETI for imaging and detectors.4 Since technologies implemented to produce Z-axis ACF use standard microelectronic equipment, CEA-LETI recently proposed achieving the ACF directly on the wafer. Two concepts were investigated.

In the first method, a matrix of fine, metallic inserts with fine pitch is made on a full wafer. This way, there is no critical alignment requirement of the matrix on the wafer, because the redundancy of the metallic inserts is such that some are always facing the pad to be connected. Moreover, the process allows more freedom as to the dielectric choice. For some applications, the topology does not enable metallic inserts to be on the passivation layer, such as when the active area below the metallic inserts is liable to be damaged. For these applications, CEA-LETI has proposed to localize metallic micro inserts essentially on the die pads. In this case, several contacts contribute to the connection.

An overview of our first results obtained on microbumping is presented here, and we compare flip chip interconnection with Z-axis ACF. Contact resistances were measured with a test vehicle that comprises various Kelvin and daisy chain patterns.

Wafer-level Microbumping Manufacturing

Various alternatives and technologies have been used to produce reliable Z-axis ACF.2,3,4 For microbumping, the manufacturing process experiment is detailed in the steps below:

  1. A metal layer consisting of an adhesion layer and a seed conductive layer is deposited on the active wafer.
  2. Photoresist is spin-coated on the wafer.
  3. Matrix of fine holes is patterned. Hole diameters and pitches as small as 2 and 6 µm, respectively.
  4. Metallic inserts, made of nickel, are electroplated through the resist.
  5. The photoresist is removed.
  6. The open seed layer is etched.
  7. A polymer is spread over the metallic inserts. Various polymers can be used for this purpose, depending on the application, such as thermoset resin and thermoplastic material.
  8. The polymer is partially etched to leave the metallic inserts salient.
  9. A thin, gold layer is deposited on top of the inserts by electroless plating.
  10. The wafer is ready to be diced. Assembly and interconnection on substrate are achieved by gluing and thermocompression.

In this study, microbumps were made of metallic inserts with a diameter of 10 µm, pitch of 30 µm, and thickness of 6.5 µm. Two polymers were evaluated: a polyimide material* and a photoresist**. For localized micro inserts, there is no polymer coating over the metallic inserts in step G. We suggest using adhesive polymer during hybridization to simplify the process. The micro inserts have a 2-µm diameter and 6-µm pitch.

Test Vehicle

To assess microbumping performances, a specific test vehicle was designed. It includes Kelvin patterns with various surface areas from 30 × 30 µm to 1,000 × 1,000 µm to assess proper contact resistance, or daisy chains from 4 to 64 contacts and an “insulation” pattern. In this study, die and substrate are made of silicon. The die includes an electrical network made of aluminum and a SiO2 passive-layer open on pad.

Each test vehicle proposes 12 Kelvin and 10 daisy chain test patterns. The daisy chain pad’s diameter is 80 µm.


Wafer-level processing was performed on 3 die wafers. Wafer #1 included a metallic insert matrix coated with a polyimide material. Wafer #2 included a metallic insert coated with a photoresist. Wafer #3 included a metallic insert matrix localized on the die pad.

Figure 1 shows a secondary electron micrograph view of metallic inserts on an aluminum pad before polymer coating for a matrix pattern. The pad size to be connected for daisy chains was 80 µm, which gave 7 to 9 insert contacts per pad for the full matrix pattern, and ~140 contacts per pad for the localized metallic inserts.

Figure 1. SEM photograph of metallic insert’s matrix on pad: full microbumping (left), and localized microbumping (right).
Click here to enlarge image

After wafer dicing, die flip chip bonding was performed using pick-and-place equipment***. Assembly and interconnection were achieved using glue and thermocompression. The bonding temperature typically was 115°C, bonding pressure was 30 kg/cm3, and the bonding time was 5 min. The contact resistance of the Kelvin and daisy chain patterns were measured using the 4-point method. This included measurements after hybridization; during thermal cycling test from -40° to 125°C for 1,000 cycles with 30 min. dwell each time; and under humid conditions of 85°/85%.

Table 1. Average daisy chain resistance as a function of contact number, using the 4-point method.
Click here to enlarge image

For comparison purposes, a die without wafer-level AFC was hybridized with our standard Z-axis ACF, and developed for bumpless interconnection. Assembly was performed using glue on die and substrate and thermocompression.


The lateral insulation between metal lines, spaced by 20 µm, was tested up to 300 V. Higher voltages encountered equipment limitations.

Contact Resistance of Kelvin Pattern. The average contact resistance for each Kelvin pattern surface measured after hybridization is summarized in Figure 2. There is no significant difference in the results comparing the three processes and the reference. It was observed that the resistance is not inversely proportional to the contact surface, as it should be. This is a result of the metal layer resistance of the pad being much higher than the metallic inserts.

Figure 2. Average contact resistance as a function of pad surface area, using the 4-point method.
Click here to enlarge image

Contact Resistance of Daisy Chains. An average contact resistance for each daisy chain measured after resistance is shown in Table 1. As for Kelvin measurement, there are no significant differences in the results comparing the three processes and the reference. The contact output through daisy chain is good (100% for 2, 4, 8, and 32 daisy chain contacts). Some discontinuity of daisy chains was observed for 64 contacts, but only for one pattern of the four.

Figure 3. Effect of thermal cycling on the Kelvin pattern contact resistance.
Click here to enlarge image

Effect of Thermal Cycling on Kelvin Pattern. The graph in Figure 3 shows the good electrical connection reliability provided by full microbumping (Wafers #1 and 2). After 1,000 cycles, the Kelvin resistance measured on 30 × 30 µm undergoes a moderate increase of less than 10%. For localized micro inserts, further developments are ongoing to optimize the hybridization process. Hybridization processes and different adhesive polymers are being tested and compared.

Figure 4. Effect of thermal resistance on the daisy chain pattern contact resistance.
Click here to enlarge image

Effect of Thermal Cycling on Daisy Chain Pattern. The results of the thermal cycling test on daisy chains with 2 and 64 contacts are shown in Figure 4. For dies from microbumping (Wafers #1 and 2), there is no increase in resistance.

Figure 5. Effect of humid environment on the Kelvin pattern contact resistance.
Click here to enlarge image

Effect of Humid Environment on Kelvin Pattern. The results of the humid environment effect are shown in Figure 5. For dies from Wafer #1, there was a significant increase of the 30 × 30 µm pads in the periphery, which was the first affected by moisture absorption in the polyimide material. As expected, dies from Wafer #2 made with the photoresist were not affected under humid conditions. This photoresist is known to absorb less moisture than the polyimide material.


Microbumping is a promising, lead-free technique that enables connection of devices with small I/O pitches (down to 30 × 30 µm). The technique demonstrates suitable electrical properties. Lateral insulation was validated for spacing between pads as small as 20 µm. The contact resistance of a 30 × 30-µm pad is as low 30 mΩ, and is reliable under thermal cycling aging and humid environments for micro inserts coated with the photoresist.

It is possible to localize micro inserts, essentially on die pads. This is interesting when the topology due to the passivation layer or soldermask is sizeable.


  1. P. Caillat et al., “Ultra-fine-pitch Vertical Interconnection Sheet: An Alternative to Fusible Bum Flip-Chip Technology in Dense Interconnection Application,” Advances in Electronic Packaging. 1997, Vol. 1., pp. 319-322.
  2. J-C. Souriau et al., “Electrical Conductive Adhesive for Flip-Chip Interconnection Based on Z-axis Conductors,” IMAPS 13th European Microelectronics and Packaging Conference and Exhibition, May 30-June 1, 2001, pp. 20-22.
  3. J.C. Souriau et al. “Electrical Conductive Film for Flip-Chip Interconnection Based on Z-axis Conductors,” Proceedings of the 52nd Electronic Components and Technology Conference, New Orleans, LA, May 2002, pp. 1151-1153.
  4. A.Gasse et al. “Assessment of Advanced Anisotropic Conductive Films for Flip-Chip Interconnection Based on Z-Axis Conductors,” Nuclear Science Symposium, Medical Imaging Conference, Portland, OR, October 19-25, 2003.
  5. J.C. Souriau et al., “Development on Wafer Level Anisotropic Conductive Film for Flip-Chip Interconnection,” Proceedings of the 54th Electronic Components and Technology Conference, Las Vegas, NV, May. 2004, pp. 155.

*DuPont’s PiQ13.
**Dow Chemical’s BCB 4026.
***Suss MicroTech.

JEAN-CHARLES SOURIAU, project manager, may be contacted at CEA-Grenoble – LETI, 17 rue des Martyrs, 38054 Grenoble Cedex 9, France; 33 (0) 4 38789813; e-mail: jcsouriau@cea.fr.


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