NEC tips 55nm CMOS work

June 12, 2006 – NEC Electronics America Inc., Santa Clara, CA, says it has developed 55nm standard CMOS process technology (dubbed “UX7LS) to be used with next-generation, ultralow-power consumption systems-on-chips (SoC), as well as the company’s CMOS-compatible DRAM technology.

The process, a shrink of its 65nm process technology, utilizes immersion lithography and a hafnium-silicate film high-k insulator film. It achieves 1/10 the power consumption in standby mode of conventional 65nm devices, and boosts on-current by 20%-30%, the company says.

Samples are scheduled to ship next summer, with mass production to begin by the end of 2007.


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