IMEC adds double-patterning to 193nm immersion, EUV litho efforts

July 12, 2006 – European research consortium IMEC has extended its research program for 193nm immersion lithography to include double-patterning techniques to address needs of leading-edge process technologies, particularly for flash memory devices. The program now runs parallel to IMEC’s other lithography efforts targeting hyper-NA immersion and extreme-ultraviolet lithography (EUV).

EUV is still seen as necessary to accommodate pitch requirements for sub-32nm CMOS, but until it’s ready for volume manufacturing, 193nm immersion needs to be extended and pushed to its limits, including hyper-NA immersion, and extensive use of double-patterning, IMEC noted, in a statement.

In its research into hyper-NA, IMEC already focuses on alternative mask stacks, high-index liquids and resists, with work performed on ASML’s XT:1700i including lens and illumination characterization and immersion baseline including resist, defectivity, and scanner. Future work will focus on reducing patterned defectivity, and improving CD uniformity and overlay performance.

IMEC says it will link its double-patterning research with its device programs on advanced CMOS for logic as well as its advanced memory program. Topics will include layout-split methodology and exploration of alternative patterning steps to improve double-patterning cost-of-ownership. In its flash program, IMEC currently is researching new cell concepts (i.e., nitride concept), implementation of high-k materials, reliability, and characterization. Several advanced logic and flash cells will be used as demonstrators in its sub-32nm lithography program, IMEC noted. Work under the institute’s EUV program is focusing on resists and reticle development, and assessment of an EUV alpha demo tool, also provided by ASML.

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