High-k Technology Shrinks Transistor Size

(January 29, 2007) YORKTOWN HEIGHTS, NY — IBM announced it is in the development stage with 45-nm transistor technology that uses high-k gate dielectric and a proprietary metal composite for the transistor gate electrode. Constructing the transistor with conventional methods such as high-temperature annealing — instead of removing and recreating the gate post-build — is a familiar process that gives engineers more control and reduces the possibility of error, said Ghavam Shahidi, director of silicon technology at IBM.

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>

NEW PRODUCTS

Spectral reflectometer for film thickness measurement
04/08/2014Verity Instruments, Inc. is pleased to announce the availability of its new SP2100 Spectral Reflectometer designed for film thickness measurement f...
New Kimtech Pure G3 EvT nitrile gloves
04/03/2014Kimberly-Clark Professional has introduced a new glove that is designed to provide process protection for the semiconductor and electronics industries....
UVOTECH releases UV-Ozone Cleaning System
04/03/2014Using a UV-Ozone Cleaner, near atomically clean surfaces can be achieved in minutes without any damage to your devices. ...