High-k Technology Shrinks Transistor Size

(January 29, 2007) YORKTOWN HEIGHTS, NY — IBM announced it is in the development stage with 45-nm transistor technology that uses high-k gate dielectric and a proprietary metal composite for the transistor gate electrode. Constructing the transistor with conventional methods such as high-temperature annealing — instead of removing and recreating the gate post-build — is a familiar process that gives engineers more control and reduces the possibility of error, said Ghavam Shahidi, director of silicon technology at IBM.

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