By Serge Zinger and Yuji Kurono, Panasonic Electric Works
MEMS technology has been used to gain significant improvements in a number of electronic and industrial applications, but until recently, the area of electronic circuitry has been neglected. Often seen as mature product, printed circuit board layouts can now be projected onto a 3D substrate to form miniaturized circuits, with unique attributes.
Panasonic Electric Works’ new MIPTEC (Microscopic Integrated Processing Technology) allows the formation of a three-dimensional printed circuit board on an injection-molded substrate using fine-pitch laser patterning, giving excellent thermal and electrical properties. This approach enables miniaturization of a module, while increasing the functionality of the device.
MIPTEC uses molded 3D substrates to allow components to be mounted at any angle without using a flexible circuit board, thus improving the stability of the component – especially important when using MEMS sensors such as an acceleration or motion sensor. Since many modules require the precise relative positioning of two or more components, such as an emitter and detector, the ability to reliably locate components relative to each other improves signal strength and reliability.
In addition, the MIPTEC technology can utilize a range of substrate materials to provide the optimal thermal or optical characteristics.
In the case of LED or laser packaging, efficient heat removal from the component can be critical to the performance of the device; using a substrate with high thermal conductivity reduces the operating temperature of the LED package, thus increasing both the brightness and the lifetime of the device.
Proprietary laser patterning technology
MIPTEC brings together a number of related technologies to be able to create the 3D circuitry – notably a proprietary laser patterning technology, unique surface activation processing and the use of novel materials, all applied to standard Molded Interconnect Device (MID) technology. This combination of techniques is used to achieve the compactness and high functionality of equipment and modules not possible with the conventional process.
The key enabling technology is the proprietary laser patterning technique which can be used to form an extremely fine-pattern electrical circuit on six molded surfaces with a laser beam. The minimum width of line/space is 70µm/70µm that supports the miniaturization of devices or modules, and is about one-third the width of the conventional process.
The position image recognition of individual elements maintains a high patterning accuracy. Pattern forming accuracy is ±30µm between each element, allowing for high performance and high reliability of products and modules. The pattern design can easily be modified through the software interface. With the conventional process of three-dimensional MID, two sets of molds are required (one for component shape and one for pattern design) with a new mold required if pattern design changes. With the MIPTEC process, only one set of molds is needed.
Surface activation processing technology allows mounting of a variety of components, including bare chips. Combined with the use of advanced materials, this provides extra pattern surface smoothness and strong adhesion of the circuit pattern, enabling stable flip-chip placement and wire-bonding of bare chips. With a conventional chemical process, Rz is about 18µm, and adhesion is achieved by the anchoring effect. With the MIPTEC process, on the other hand, Rz is about 2.8µm, which makes it is easy to form a micro-pattern circuit, and has the additional benefit of forming an optically reflecting surface.
Ceramic material can be used in the MIPTEC process, and it is particularly suited for applications requiring heat dissipation, prevention of thermal deformation and high-frequency characteristics. Ceramic MIPTEC delivers both stable ceramic properties and pattern accuracy from the process of injection molding, sintering, and pattern forming.
Panasonic’s MIPTEC manufacturing process, called “one-shot laser-structuring method,” consists of four major stages: (1) molding, (2) circuit forming, (3) plating, and (4) cutting.
The first stage has two steps: injection-molding and surface activation treatment. The intended shape is injection-molded in a sheet form containing multiple units for production purposes. Then, surface activation treatment is applied to smooth out the surface and to increase adhesion of the conductor.
The second stage, known as circuit forming, incorporates two steps: metallization and patterning. Thin copper film is formed in the base metallization process. A laser is then used to remove copper and outline the circuit pattern, with the wavelength and exposure time of the laser optimized to achieve copper removal without damaging the substrate. With a dynamic focus function, the laser focus position is controlled to remove a constant width of copper regardless of the angle of the sloped surface.
The plating stage consists of three steps: electric copper plating, soft etching, and electric nickel and gold plating. First, copper is electrically plated to form the circuit pattern. Then, soft etching is applied to remove unnecessary copper that was not removed by the laser in the previous stage. Finally, nickel and gold are plated on the copper to help prevent oxidation and corrosion.
In the final cutting stage, the sheet form is diced into individual pieces.
Optimizing performance of the miniaturized package
A series of simulation techniques have been developed to support MIPTEC applications as needed. To optimize the circuitry design and, ultimately, the package performance, a wide variety of analyses can be applied to the process.
Optical analysis, which includes optical intensity and beam distribution analysis, is used for the purpose of developing package designs with the best possible reflective properties. Thermal analysis, including conductivity characteristics, can be related to the performance reliability and lifetime analysis of MIPTEC devices.
By analyzing the flow of resin, the injection process can be optimized and the weld-line position identified, while the fiber orientation analysis determines thermal deformation and expansion/shrinkage tendency. Finally, analysis of stress in the solder joints, which can be caused by a difference in the coefficient of thermal expansion, helps improve package reliability.
Applications of MIPTEC
3D circuitry formed by MIPTEC can be used in a wide range of applications, each of which relies on one or more of the unique benefits of the technology.
For example, LED packages can have higher efficiency by incorporating a reflective surface; in this case, a carefully controlled silver plating procedure can be incorporated into the MIPTEC process to maximize reflector efficiency and anti-corrosion performance. By controlling the size of crystals in the plating, the reflectivity of the surface can be optimized. For example, a grain size of approximately 3µm may give a reflectivity of 94% at 475µm; compared to 92% with a 1µm grain size.
Careful control of the surface morphology can also be used to reduce corrosion of the material and to prevent solder creep.
Flip-chip packaging is also made possible by the selection of a molding material with a low coefficient of thermal expansion to minimize anisotropy, to reduce the stress load on the adhesive used to secure the gold bumps. Tests show that the connecting resistance on a typical IC chip with gold bumps is reduced from 50mW to 35mW using the anisotropic process, thus increasing the reliability of the package.
MIPTEC technology can been applied to a wide range of miniaturized devices, including the integration of an LED chip and image sensor into a single module for a cell-phone camera; the combination of components in a behind-the-ear hearing aid to eliminate the need for multiple flexible boards; and the placement of an acceleration sensor at an angle within a module to detect tilt. Over the last three years, Panasonic has used MIPTEC to manufacture some of its products. For example, MIPTEC was used to integrate an ASIC chip, image sensor, and amplifier into a miniaturized motion sensor, reducing the overall package size by a factor of 10 from its original design.
This new three-dimensional circuitry will enable the development of any number of devices that require flexibility, miniaturization, and optimal electrical and thermal properties, and is another step in the widespread adoption of micro-technology manufacturing.
Serge Zinger is engineering manager in the technical marketing division, and Yuji Kurono is project engineer, both at Panasonic Electric Works Corp. of America (pewa.panasonic.com). For more information, contact MIPTEC@us.pewg.panasonic.com.