May 4, 2007 – Researchers at the National Institute of Standards and Technology (NIST) say they have created a method for manipulating and positioning individual nanowires on semiconductor wafers, enabling fabrication of test structures using only optical microscopy and conventional photolithographic processing.
Today’s smallest-diameter nanowires are assembled atom-by-atom in a “bottom-up” bulk growth process, e.g. through CVD, which creates “haystacks” of nanowires of varying lengths and diameters, NIST explains in a statement. Typically, that means “throw[ing] a whole bunch of these down on the test surface, hunt around with a microscope until you find a good-looking wire in about the right place, and use lithography to attach electrical contacts to it,” said NIST electronics engineer Curt Richter, in a statement.
The new process from NIST uses a modified probe station with high-resolution optical microscope and a system that positions work surfaces under a pair of customized titanium probes, each with <100-dia. tips (see figure, above). Silicon nanowires suspended in a drop of water are deposited on a staging wafer patterned with tiny posts; once dried the nanowires are left sitting on top of these posts, and can be picked up by the probe tips using static electricity. The test structure wafer is positioned under the probes, and the wafer and/or probe tips are moved until the nanowire can be placed on the desired position. (The figure, below, shows a nanowire placed into an etched trench.)
While admittedly “not at all suited to mass production,” the process does have potential application in creating elaborate structures to test nanowires’ properties. NIST has already built a multiple electrical-contact test structure to measure nanowire resistance independent of contact resistance, as well as an electromechanical switch to measure the nanowires’ flexibility. Improving the probe tips’ sharpness and utilizing higher-resolution microscopes should improve the testers’ sensitivity beyond current capabilities of >60nm-dia. wires.
(a) Schematic of NIST single nanowire manipulation system. (Source: NIST)
(b) Scanning electron microscope image shows a single silicon nanowire positioned in an etched trench using NIST’s nanowire manipulation technique. The trench helps keep the nanowire in position during the fabrication of the rest of the test structure, which measures metal/nanowire contact resistance. [Scale bar = 20 microns] (Source: NIST)