(September 24, 2008) SHAUMBURG, IL SMT editor-in-chief Gail Flower chaired a panel comprising equipment supplier, laboratory, EMS provider, and consultant voices at IPC Midwest in Schaumburg, Ill. David Geiger, Flextronics International; Jacques Coderre, Unovis Solutions; Vern Solberg, STI – Madison; and Gene Dunn, Panasonic Factory Solutions of America spoke about emerging packaging technologies.
Solberg started off with a focus on miniaturization. Wireless handsets are a major driver, but many other sectors are looking to improve speed and performance through miniaturization. Wafer-level packaging (WLP) and chip on board (COB) attachment are helping this trend. Interestingly, Solberg notes, the layout of WLPs are standard pitches to PCB assembly, even though they are bare die flip chips. At the wafer level, they are redistributed to these standard pitches. Solberg also discussed the logistics of die stacking within a package (system-in-package SiP) against package-on-package (PoP) stacking, which can be done prior to board assembly or as part of the SMT assembly process, stacking up to eight packages. With low-profile packages, larger stacks can be achieved.
Dunn examined die and chip miniaturization, blended with a look at thin-die manufacturing and packaging issues, such as stress defects, that can result. Thinner wafers and smaller die sizes are filling packages today. Six years ago, 1.0mm sized die were considered small. Dunn says that 0.15mm die are today’s small die. Boards also are getting thinner and smaller. Cell phones can be less than 10mm thick and still offer feature-rich user experiences, Dunn noted. Thinness with die trending toward 25µm thickness brings fragility to these end-products’ components. Embedded applications are driving thinner, smaller chips, like 0201s, into multiple applications. By 2010, Dunn expects to see up to 10 thinned die with thin ball pitches in a 3D package. New technologies like plasma stress relief after wafer backgrinding, and plasma dicing in the back-end process are helping packagers cope with thin die. EMS providers will need to consider board layout for bend possibilities, pick-and-place systems for the force they put on components, and reflow overheat concerns. Encapsulation material for packages with thin, small die must help prevent warpage that can stress and bend die. For pick-and-place, tact times can get longer as the pick head slows down on approach to apply less force to the tiny passive component body. For PoP assembly, dip vacuum and depth are considerations for pick-and-place. How do you inspect flux/paste dip coverage before stacking? These and other considerations bring together equipment and materials suppliers to tackle emerging packages from an EMS perspective.
Coderre presented “Assembly Evolution as Semiconductor and Circuit Board Converge,” looking at the collaboration and convergence of package technology with board-level interconnect. At his lab, Coderre helps companies develop advanced processes in both semiconductor and PCB assembly sectors. This can take the form of fast, SMT-style processes moving into the semiconductor fabs and SiP packaging houses; and integrating flip chip and SMT into one line with one reflow pass; and bringing packaging steps into the circuits assembler’s facility. Embedded devices in the PCB, die feeders on pick-and-place systems, and other examples prove this trend. Coderre also sees board density as now including cubic density, not just 2D board layout density. This is like building up a city that can’t expand its geographical limits metros go underground (into the PCB) and buildings stretch taller (stacked and 3D packages). EMS assemblers now must consider interconnect reliability inside the board, not just solder joints formed in the SMT line. Embedded components also require higher placement accuracy to avoid defects.
Finally, Geiger talked about how EMS assemblers implement these new packages in their process. Communication with the supply chain is important for integrating these packages and maintaining high yields. Land patterns, special vias, thermal grounds,flux dips, etc., all need to be taken into account, along with reliability requirements. PoP cannot be successful without proper reflow preventing warpage. Packaging companies can work with the EMS provider, and OEM companies are out of the loop. Or, OEMs sometimes work with the packagers, and then tell the EMS provider to build a product a certain way. The best way to work together, Geiger said, is to get the packaging house, OEM, and EMS provider together so everyone understands why the design and manufacturing must be done in the way that it is. He pointed out that the EMS provider has to ask questions and learn new things to successfully manufacture with these new packages. Additional elements like underfill for fragile packages, drop testing for 3D package reliability verification, etc. will come into the process faster if the EMS facility, OEM, and packaging house are communicating and querying each other productively.