Using 2D and 3D X-ray Techniques to Find and Confirm Manufacturing Defects in Fip Chip Devices
By Evstatin Krastev, Ph.D. Dage Precision Industries, a Nordson Company
The basic, straightforward design of a flip-chip device calls for the conductive bumps of the silicon chip to be placed directly on the interconnection points of a substrate or PCB. This format eliminates excessive packaging, which offers operational benefits at high frequencies with low parasitics in a high I/O density. At the same time, high-density flip-chip devices place a greater burden upon device inspection during both the device manufacture and subsequent processing onto a substrate or PCB.
The overall use of flip chips is increasing due primarily to performance advantages in multi-functional handheld devices where typical pin counts are in the 200-700 I/O range. Because of they’re inherently higher I/O density, the use of flip-chip devices for applications other than mobile or handheld products is generally limited to applications of 1,000 I/O or greater. However, the rising cost of gold has increased the demand for flip chip versus gold wire bonding to a point where the crossover point has come down to 500 I/O for several applications.1
Flip chip defects can occur when devices are reflowed and can include cracks, head-in-pillow and/or interfacial voiding. Tilt angle capability, or oblique angle viewing, is very critical for identifying flip chip defects and can be very easily accomplished using a modern 2D X-ray inspection system. It is good to use tilt or oblique angles of 55 to 70° and rotate the x-ray detector at 0 to 360° around the examined joint.
A flip chip crack less than 1mil is challenging for any X-ray inspection systems to detect. The proper use of tilt and rotation angles together with the right X-ray parameters including kilo volts (kV) and power is of crucial importance in detecting cracks (Figure 1).
Head-in-pillow defects are the phenomena that can occur when incomplete wetting of the entire solder joint results in the solder paste coalescing separately from the solder ball or solder bump after reflow. Also considered an open joint, head-in-pillow defects typically occur more frequently with ball grid array (BGA) devices but can also occur with flip chips (Figure 2).
Head-in-pillow defects are difficult to detect with lower performance 2D X-ray systems, and may require destructive cross sectioning in order to identify and confirm this deficiency when they fail at in-circuit test and functional test. However head-in-pillow defects can be easily identified with off-axis X-ray viewing using modern 2D X-ray inspection systems without destroying the flip chip, substrate or PCB.
Detecting small cracks down to 1mil or finer, as well as head-in-pillow defects is a challenge but can be accomplished using modern 2D X-ray inspection systems. The tilt and rotation angles need to be adjusted carefully since the two angles are among the key factors playing a critical role in identifying small features.
With the continued emergence of subsystem integration, advanced 3D packages including flip chip devices are replacing standard lead-frame packages. Multiple stacked die packages such as package-in-package (PiP) and package-on-package (PoP) meet the demand for greater circuit density and improved electrical performance since they interface directly with solder bumps, solder land pads, or solder bumped pads.
However, to achieve these benefits, these packages contain multiple die stacked one on top of the other, with multi-level wire bonding or multi-level wafer bumping all within a single packaged device. Such increased level of complexity provides unique challenges for package inspection and quality control process qualification during device packaging and subsequent assembly. In particular, these more complicated packages now have the opportunity to exhibit defects both internal to the package as well as when assembled with the substrate or PCB. Such defects can include cracks, missing connections, interfacial voiding, wire bonding defects and/or die interface issues.
In certain cases 2D X-ray inspection may be limited in what it can analytically provide when inspecting complex, multi-level 3D packages and is increasingly being complemented by computerized tomography (CT). CT is an imaging method where mathematical geometric processing is used to generate a 3D virtual model of a device by taking a large series of individual 2D X-ray images as the object is rotated about a single axis of rotation. Once the CT model has been produced, it allows ‘virtual micro-sectioning’ by investigating any two-dimensional plane within the entire model as well as real-time manipulation of the 3D model. This allows complete examination of features or defects within a device or package that would otherwise remain hidden by multi-level interconnections such as the cracked solder bumps within a multi-layered device (Figure 3).
Computerized tomography can also detect interfacial voiding within multi-layer devices since it is difficult to determine the exact location of voiding without using 3D CT imaging.
Since flip chip solder bumps are small objects, they can be easily concealed by larger solder bumps or solder balls which makes the option of 3D imaging useful. Two-dimensional and 3D imaging work together as complementary inspection techniques within modern X-ray inspection systems where they can switch between 2D and 3D modes in a matter of minutes. This allows the benefits of both techniques 2D being very fast and 3D helping to resolve obscured details and potential hidden defects. Both techniques have the added benefit of being non-destructive.2
Recent advancements in CT technology have made it an extremely useful tool in the analytical arsenal for the inspection of flip-chip devices and 3D packages. It enables complete viewing of interconnections with a package which otherwise may be obscured by other joints or objects when viewed only with 2D x-ray inspection. The combination of 2D x-ray and CT analysis offers powerful analytical capabilities need for the complete inspection of flip-chip devices and stacked packages.
1. Cole-Johnson, Sally, “Flip-Chip Changes on the Horizon,” Semiconductor International, July 2008
2.Bernard, David and Krastev, Evstatin, “Investigating Defects in 3D Packages Using 2D and 3D X-ray Inspection,” SMTA International, August 2008
EVSTATIN KRASTEV, Ph.D., applications manager for semiconductor packaging and PCB inspection, Dage Precision Industries, may be contacted at firstname.lastname@example.org.