Design Platform for 3D Stacked ICs

The j360 Silicon PathFinder 3D Platform from Javelin Design Automations supports 3D stacked IC design using through silicon vias (TSV). The design tool reportedly extends the Javelin PathFinding methodology and j360 Silicon PathFinder platform to support virtual chip design for co-optimization of system design and 3D interconnect-packaging technologies.

Designers of 3D ICs are now empowered to rapidly explore many potential 3D design implementations for their technical value propositions, and to identify and mitigate risks-benefits and optimize value. Javelin Design Automation Saratoga, CA. www.javelin-da.com

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