Design Platform for 3D Stacked ICs

The j360 Silicon PathFinder 3D Platform from Javelin Design Automations supports 3D stacked IC design using through silicon vias (TSV). The design tool reportedly extends the Javelin PathFinding methodology and j360 Silicon PathFinder platform to support virtual chip design for co-optimization of system design and 3D interconnect-packaging technologies.

Designers of 3D ICs are now empowered to rapidly explore many potential 3D design implementations for their technical value propositions, and to identify and mitigate risks-benefits and optimize value. Javelin Design Automation Saratoga, CA. www.javelin-da.com

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>

NEW PRODUCTS

MEMS wafer inspection system from Sonoscan
06/25/2014Sonoscan has announced its AW322 200 fully automated system for ultrasonic inspection of MEMS wafers....
Radiant Zemax announces ProMetric Y series compact imaging photometers
06/18/2014Radiant Zemax, a provider of light and color test and measurement systems, announces the release of the ProMetric Y line of imagin...
Chad Industries will demonstrate world-class flexible automated wafer handling for 450mm wafers at SEMICON West 2014
06/12/2014Chad Industries, owned by Jabil Circuit, Inc., announced today that it will demonstr...