(November 4, 2010)

IEDM Previews:
Intel fabs highest mobility pFET with Ge channel
University of Tokyo first to demo III-V self-aligned source/drain
IBM, Macronix identify phase-change memory failure mode
Record photodiode quantum efficiency from Taiwan lab
How strain can protect devices from ESD
SEMATECH tipping III-V MOSFET, FinFET, and resistive RAM
TSMC anneal for gate-last HKMG process
Imec IEDM presentations to cover More than Moore, ITRS
When do TSV stresses affect device operation?
Multi-threshold-voltage flexibility in FDSOI
CMOS imager works from light to night
Carbon nanotube vias approach production densities
IBM Alliance simplifies pFET HKMG
IM Flash details 25nm NAND

— Laura Peters, contributing editor, discusses TSMC’s HfZrO/TiN stack, fabricated by a novel multi-deposition, multi-anneal process. TSMC will present the results at the upcoming International Electron Devices Meeting (IEDM, San Francisco, CA, December 6-8, 2010) with researchers from the Nanyang Technological University (Singapore).

Between gate-first and gate-last, TSMC (Hsinchu, Taiwan) is pursuing a gate-last approach to high-k/metal gate processing for advanced device generations. At the upcoming International Electron Devices Meeting, researchers from the Nanyang Technological University (Singapore) and TSMC will present results of a HfZrO/TiN stack, fabricated by a novel multi-deposition, multi-anneal process in an ultraviolet-ozone ambient. The UV-ozone process enabled an order of magnitude reduction in leakage current, improved stress-induced degradation in terms of leakage increase and flat band voltage shift, and improved dielectric breakdown strength in high-k/metal gate devices relative to a conventional rapid thermal anneal (RTA).

The researchers grew 5500Å of field oxide, defined the active area and prepared a 1nm interfacial layer. Then, the different HfZrO layers were deposited by atomic layer deposition and annealed (ex situ) using the processes shown in the table. The UV light was generated by a low-pressure mercury vapor grid and interacts with oxygen to form ozone. Next, the 50 nm TiN electrodes were deposited by PVD and patterned, followed by forming gas annealing at 425


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