22nm brings maskmakers, end users closer Technology forecasts for 22nm Addressing defectivity will require new surface-engineering processes at 22nm RoHS, device shrinks will continue to drive packaging technology Tooling and process technology vital for thin packages More collaboration is needed to improve process integration 22nm brings maskmakers, end users closer 22nm: The era of wafer bonding Failure analysis challenges at 22nm drive the need for turn-key failure analysis solutions A materials evolution and revolution for 22nm devices Enabling lithography for the 22nm node Keys to CMP and cleans: Defect reduction and process customization Gate structure/3D stacking "winners" will determine industry direction (This is an online exclusive essay in SST‘s Forecast for 2011: Back to Reality series.)January 11, 2011 – For mask manufacturers, the conditions and challenges at the 22nm (32nm half-pitch) technology node are becoming clear. Immersion argon fluoride (ArF-i) will remain the preferred critical-layer lithography. Double patterning (DP) and source-mask optimization (SMO) methods will both become pervasive for image features at sub-80nm pitch. While extreme UV (EUV) lithography is not yet production-ready, several pre-production EUV scanner deliveries are scheduled for 2011, with production tools following within two years. We expect a concerted effort to employ EUV for memory production at 32nm half-pitch, even if only in a limited fashion, to gain experience for future technology cycles. DP, SMO, and EUV all carry technical challenges for mask manufacturers. SMO brings pattern complexity and the attendant large pattern files, long write times, and complex inspection and repair. But SMO is an evolutionary step, and should be manageable with no more than the "moderate" pain typical of node transitions. And while DP poses a significant overlay challenge, mask manufacturers have successfully produced complementary phase-shifting masks (a double patterning method) since the 130nm cycle. As for EUV, mask defectivity is still an open development issue. An industry-wide effort is in place to reduce EUV mask blank defects 100-fold and to develop an EUV mask inspection and print verification toolkit. In particular, actinic mask pattern inspection will not be available as EUV is introduced into production, so a bridge strategy to manage mask defects will be necessary. We should also expect to encounter heretofore-unseen EUV mask production issues, such as durability. What does this all mean for the mask community? For both DP and SMO, the traditional design-mask-wafer supply chain will become more closely knit than ever before. EUV’s pan-industry initiatives will result in novel business models for EUV mask manufacturing, perhaps similar to the models that wafer manufacturers have developed as fab costs have skyrocketed. For example, it’s possible that we will see merchant and captive mask manufacturers cooperating. Gone is the era when an end user simply handed a specification to the mask manufacturer. These days, we are just as likely to be handed a question; "What do you think we need?"