Stacked silicon interconnect is better than 3D stacking Xilinx

By Debra Vogler, senior technical editor

February 8, 2011 – Xilinx’ stacked silicon interconnect technology (SSIT) was first introduced in October 2010. ElectroIQ caught up with Suresh Ramalingam, director of advanced package design and development at Xilinx, at the January MEPTEC luncheon (1/12/11, Santa Clara, CA), where he gave a presentation on the technology. has published several articles about Xilinx’ stacked silicon interconnect technology: 
Insights from the Leading Edge: Xilinx 28 nm Multidie FPGA, Copper Pillar Advances…
Xilinx stacked silicon interconnect creates multi-die FPGA…
Xilinx on stacked silicon interconnect technology

In a podcast interview with senior technical editor Debra Vogler, Ramalingam discusses the technical challenges associated with the company’s stacked silicon interconnect technology. He noted that through silicon vias (TSVs) — especially Cu-based TSV — involve significant stress challenges and a key part of the solution is figuring out the material set (e.g., the liner materials) and the design space that makes this problem transparent to what needs to be done for post-processing of the interposer and the packaging. Xilinx spent about a year before it could get to a robust working solution, he said.

Listen to Ramalingam’s interview here: Download (iPod/iPhone users) or Play Now

Regarding the side-by-side integration that is inherent in SSIT, Ramalingam said the company believes that it is a much better approach than 3D stacking because the thermal issue is pretty much nonexistent in the sense that the power dissipation would be more like a monolithic chip package. From an ease of design standpoint, he said that standard EDA tools can be used where the interposer is treated just like additional layers in the design of the silicon.

The company is currently working on a 28nm test vehicle, and they already have first packages back. Process qualification work is expected to be completed within the next quarter or two.    

Subscribe to Solid State Technology/Advanced Packaging.

Follow Advanced Packaging on by clicking Or join our Facebook group


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>


MKS introduces the I-Series family of high flow mass flow controllers
02/25/2015MKS Instruments, Inc., a global provider of technologies that enable advanced processes and improve productivity, has introduced th...
TMC introduces stage-base 450 with voice coil technology
02/10/2015TMC, a developer of high-performance vibration and motion cancellation technology, has introduced Stage-Base 450, its next generation of frame-m...
Entegris launches Dispense System optimized for 3D and MEMS applications
02/03/2015Entegris, Inc. announced the latest addition to its IntelliGen family of two-stage dispense technologies used in microelectronic...