May 4, 2011 – Marketwire — STATS ChipPAC Ltd. (SGX-ST: STATSChP), semiconductor test and advanced packaging service provider, has shipped over 300 million semiconductor packages with copper wire-bond interconnects. The SATS provider is investing in Cu wire bonding for finer silicon nodes (45/40nm) and low-k/extra low-k (ELK).
STATS ChipPAC is investing in equipment and resources to support copper wire technology in wafer nodes down to 45/40nm with low-k and ELK dielectric materials. Development work is focused on finer bond pad pitches, thinner wire diameters, stacked die packaging and die-to-die bonding, each of which represents a greater set of challenges in the application of copper wire.
The transition from gold to copper wire interconnect in semiconductor packages offers a significant savings in material costs while meeting electrical and thermal performance characteristics with quality and reliability standards that are comparable to gold wire, the company states. STATS ChipPAC has copper wirebond capabilities in all five of its manufacturing facilities in Asia, each with class 1000 cleanroom environments.
Production volume has been rapidly increasing in both leadframe and laminate packages. "We are in high-volume manufacturing for a large number of devices across multiple factories and have built significant momentum on the engineering front to introduce copper wire into a wider range of applications in the communication, computing and consumer markets," said Hal Lasky, EVP and chief sales officer, STATS ChipPAC.
"We are successfully addressing many of the technical challenges that are associated with using copper wire interconnect in more complex package structures. We have been aggressively developing copper wire capabilities in all our factories and rapidly expanding into a broader range of fine pitch devices and advanced silicon nodes. Our dedicated resources, especially our strong global copper wire engineering organization, ensure a consistent and successful transition to copper wirebond for our customers," said Dr. Han Byung Joon, EVP and chief technology officer, STATS ChipPAC.
STATS ChipPAC Ltd. is a leading service provider of semiconductor packaging design, assembly, test and distribution solutions in diverse end market applications including communications, digital consumer and computing. With global headquarters in Singapore, STATS ChipPAC has design, research and development, manufacturing or customer support offices in 10 different countries. STATS ChipPAC is listed on the SGX-ST. Further information is available at www.statschippac.com