GLOBALFOUNDRIES: Ready for 20nm semiconductor designs

August 30, 2011 — GLOBALFOUNDRIES successfully taped out a 20nm test chip using flows from Cadence Design Systems, Magma Design Automation, Mentor Graphics Corporation, and Synopsys Inc. GLOBALFOUNDRIES customers can now begin evaluating their 20nm semiconductor designs.

Also read: Analyst take: Why Intel/Micron’s 20nm NAND flash is a big deal

The four EDA companies demonstrated that their place-and-route (P&R) tools and tech files can support advanced rules for 20nm processes. The flows include library preparation steps for double patterning lithography, which the 20nm test chip required of each EDA partner contributing a large placed and routed design. Other steps included placement, clock tree synthesis, hold fixing, routing and post-route optimization. Prior to tape out, each design was thoroughly validated by GLOBALFOUNDRIES and checked against 20nm sign-off verification decks.

Early collaboration with EDA vendors accelerated the 20nm development and verification cycle, said Mojy Chian, senior vice president of design enablement at GLOBALFOUNDRIES. GloFo will continue to enhance the design enablement support for the 20nm node.

GLOBALFOUNDRIES worked with each of the EDA suppliers to include the necessary setup and support for technology and mapping files. The flow will also demonstrate foundry support for extraction, static timing analysis and physical verification. GLOBALFOUNDRIES will make the design, libraries, and complete vendor flow scripts available to customers.

20nm adds "several advanced manufacturing rules" that require early collaboration with foundry partners, said Chi-Ping Hsu, senior vice president, Research and Development, Silicon Realization Group at Cadence Design Systems. Premal Buch, general manager of Magma‘s Design Implementation Business Unit, says several customers that are successful at the 28nm node are now evaluating 20nm. It is important to offer "options and capabilities" for the 20nm node, added Joseph Sawicki, VP, Design to Silicon Division, Mentor Graphics, for users to optimize silicon designs. Bijan Kiani, VP of product marketing at Synopsys, notes that the Synopsys 20nm solution uses some of the EDA company’s most advanced tools and technologies.

GLOBALFOUNDRIES is a full-service semiconductor foundry with a global manufacturing and technology footprint. For more information on GLOBALFOUNDRIES, visit

Subscribe to Solid State Technology


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <s> <strike> <strong>



Edwards launches new vacuum pumps at SEMICON China 2016
03/15/2016Edwards announced the availability of two new vacuum pump product families at SEMICON China: the iXM Series for semiconductor etch and chemical v...
Low-outgassing Faraday Isolators to improve lifetime and reliability of optical systems
02/18/2016Qioptiq, an Excelitas Technologies company introduces the LINOS Low-outgassing Faraday Isolators, the first of th...
Versatile high throughput SEM from JEOL
11/04/2015JEOL's new JSM-IT100 is the latest addition to its InTouchScope Series of Scanning Electron Microscopes....