August 12, 2011 — SEMI will hold the first-ever SiP Global Summit, September 7-9, co-located with SEMICON Taiwan. Three forums cover system in package (SiP) test, the "3D IC era," and the requirements of mobile electronics.
Participants will include ASE, Qualcomm, Sony, TSMC, Verigy; and R&D and market research organizations including Gartner, Fraunhofer IZM, IMEC, Yole Development and ITRI.
SEMI cites mobile electronics — smartphones, e-book readers, etc. — as a major driver for SiP heterogeneous architectures. An ITRI recent forecast indicates that production value of 3D-ICs for mobile phone applications will hit $3.65 billion by 2015.
Three major forums comprise the first SiP Global Summit: 3D-IC Test Forum, 3D-IC Technology Forum and Embedded Substrate Forum. Representatives from 25 firms will speak on 3D-IC, TSV, silicon interposer and embedded substrate technologies.
The test section — 3D-IC Test Forum: Finding Heterogeneous Integration Solutions — will outline package test challenges that inhibit yields. Executives from ASE, KYEC, and Qualcomm will discuss 3D TSV challenges and cost strategy from the operators’ perspective. FormFactor and Teradyne executives will discuss how equipment makers attack the challenges facing test operators.
3D-IC Technology Forum: Ringing in the 2.5D- and 3D-IC Era will cover the transition from 2D form factors into the Z space. How will packaging houses balance performance optimization, time-to-market expedition and cost reduction? Speakers will discuss different materials, equipment, process nodes, and product standardization and commercialization methods. Organized by IMEC and SEMI, this forum gathers presentations by ASE, IEEE-CPMT, IMEC and Xilinx.
The Embedded Substrate Forum: Last Mile to a Heterogeneous Integration forum will feature R&D staffers from Nokia, who will discuss the differences between packaging substrates, module substrates and motherboards with an eye on mobile technologies. TechSearch International will also share information on the embedded substrate developmental trend.
Free registration for the event is available at www.sipglobalsummit.org
"Cost control, design, mass production, and testing" need improvements as commercialization ramps up, noted Dr. Ho-Ming Tong, general manager and chief R&D officer of ASE. Deployment of silicon interposer, or 2.5D IC, technology is expediting migration from the 40 to 28nm node. "Commercialization of 2.5D- and 3D-ICs may take place in 2013," says Tong.
SEMICON Taiwan, held simultaneously with the SiP Global Summit, will feature the Advanced Packaging/Testing Gallery sponsored by ASE and KYEC, showcasing cutting-edge testing/packaging technologies and applications. Learn more at http://www.semicontaiwan.org/en/
SEMI is a global industry association serving the manufacturing supply chains for the microelectronic, display and photovoltaic industries. For more information, visit www.semi.org.