September 21, 2011 — Synopsys Inc. (Nasdaq:SNPS), software and IP provider for electronics design, verification and manufacture, enhanced its TetraMAX ATPG and Yield Explorer to improve volume diagnostics flow and speed up yield ramp for IC manufacturing.
If yield does not reach acceptable levels during initial semiconductor manufacturing phases, dominant failure causes must be identified and fixed. Volume diagnostics efficienctly determines failure causes. TetraMAX ATPG identifies potential defects from scan test failures, using physical design data to significantly improve diagnostics accuracy; Yield Explorer analyzes these potential defects across multiple failing devices to uncover systematic yield issues, also using physical design data to identify specific yield-limiting layout geometries.
The Synopsys enhanced volume diagnostics products cross-correlate large volumes of data from design, fab, and manufacturing test to analyze defect causes. In this latest release, flow in TetraMAX ATPG and Yield Explorer is automated with a new direct connection between the two products. The upgrade includes functionality to import both physical design and test data from defective silicon using industry-standard formats.
LEF/DEF facilitates easy, one-time import of physical design data, and STDF V4-2007 enables transfer of defective silicon data from industry-leading testers. The new STDF V4-2007 format was developed by SEMI’s CAST working group.
TetraMAX ATPG and Yield Explorer are part of Synopsys’ comprehensive synthesis-based test environment, along with DFTMAX compression for power-aware scan test, DesignWare STAR Memory System for test and repair of embedded memories, and DesignWare SERDES IP with built-in self-test (BIST).
Synopsys Inc. (Nasdaq:SNPS) is an electronic design automation (EDA) supplier to the global electronics market. Visit Synopsys online at http://www.synopsys.com/.