EUV Symposium report card: EUV’s past, present, and future

October 28, 2011 – Two Wall Street analysts report their impressions from last week’s EUV Symposium (Oct. 17-19 in Miami), where companies in the EUV supply chain reported their latest results and planned progress through 2012. And don’t look now but there’s a competition brewing in source power.

Chipmakers and suppliers have figured out tricks to keep pushing optical litho (193nm) and seem prepared to do so through the 2Xnm nodes using immersion (2nd-gen), multiple patterning (double, triple, or even more), and design-for-manufacturing techniques. But to stay on Moore’s Law at 1Xnm and below, the industry needs EUV –and lack of acceptable progress is making chipmakers increasingly uneasy. First and foremost, throughput issues need to improve dramatically, which means primarily getting light sources up to snuff. (Other areas of EUV have been "largely resolved," from resists to reticles to optical quality.) Throughput is still in the low teens, and although ASML and partners have recast promises of ~60 wafers/hour by mid-2012 and 100WPH by end of next year (seen as the baseline for economically viable volume manufacturing), that’s about a year and a half beyond original expectations, and there’s mounting frustration at the progressive baby steps. "[The] "roadmap slip for EUV sources must stop," Barclays’ CJ Muse quotes one BACUS attendee as saying.

A quick summary about 193nm litho vs. EUV, pulled together by Credit Suisse’s Satya Kumar:

  • Lithography technology represents about ~23% of current investments in wafer-fab equipment — a number that will go up as devicemaking gets more complex (aka increased "capital intensity")
  • Immersion litho systems cost $50M (

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