According to Dr. Andrei Pavlov, president and founder of ScanNano Tek, the program is intended to design, prototype and evaluate, MEMS devices, using ScanNano’s Deep Vacuum Gap (DVG) manufacturing technology. In the first-stage, the devices will be directed mainly towards Radio Frequency (RF) applications (e.g. RF switches, variable capacitors and integrated circuits) in the telecommunications market. The program will also evaluate the design and cost benefits expected from using DVG Technology at the commercial production stage.
Pavlov explained that, "Proving out our DVG technology is a critical step in our strategy to grow Scannano into a major designer of advanced Nano-MEMS devices for a wide range of new applications in many different markets."
Pavlov describes deep vacuum gap technology as a unique method of producing highly accurate vacuum gaps within MEMS and NANO devices without the need for multiple fabrication and encapsulation steps. DVG permits the fabrication of structures having nano-gaps which can be as small as a few nanometers in size, or even less than 1nm (e.g., 0.5nm). There can be several nanogaps in one device and the device may have multi-gap or multi-nano-gap structures.
Present technology requires the use of a sacrificial layer and an etching process which limits the minimum size of the gap because it is more difficult to etch thinner sacrificial layer materials underneath the top structure. Accordingly, the sensitivity of the MEMS structure is lower for larger gaps and higher power is needed to control the devices. Furthermore, most traditional MEMS devices require a vacuum in the gap and therefore, require special protection from ambient atmosphere, such as sealing and encapsulation. Because ScanNano’s DVG devices can be produced accurately at the NANO scale, many more devices can be accommodated in the same space, offer lower power consumption and encapsulation is not necessary. Furthermore, the demanding requirements associated with current MEMS/NANO technologies limits the range of qualified manufacturing facilities. On the other hand, ScanNano’s DVG technology permits its implementation in conventional CMOS manufacturing facilities. And because encapsulation is not required, material and manufacturing costs are significantly reduced, explained Pavlov.