IEDM 2011: InGaAs trigate MOSFET

Here’s one that combines two popular leading-edge chipmaking themes: dipping into the semiconductor material toolbox and 3D trigates. An Intel-led team will unveil trigate FinFET-type quantum well InGaAs MOSFETs with 30nm gates, delivering the best electrostatic performance of any III-V MOSFET. Two key metrics are examined: subthreshold slope and drain-induced barrier lowering. (And a special kudos to lead author Marko Radosavljevic, a fellow Bates College alum.)  [Paper #33.1, "Electrostatics Improvements in 3-D Tri-Gate Over Ultra-Thin Body Planar InGaAs Quantum Well Field Effect Transistors with High-K Gate Dielectric and Scaled Gate-to-Drain/Gate-to-Source Separation"]

Next slide: Solar cell records for CIGS, c-Si


Previous slide: Improve HKMG reliability with better SILC

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <s> <strike> <strong>

LIVE NEWS FEED

NEW PRODUCTS

ULVAC launches NA-1500 dry etching system for 600mm advanced packaging systems
03/24/2017ULVAC, Inc. is pleased to announce the NA-1500 dry etching system for 600mm advanced packaging substrates, providing for u...
Astronics Test Systems announces new PXIe test instruments
01/24/2017Astronics Corporation, through its wholly-owned subsidiary Astronics Test Systems, introduced two new test instruments today. ...
Edwards launches new Smart Thermal Management System at SEMICON Europa 2016
10/25/2016Smart TMS helps semiconductor, flat panel display and solar manufacturers improve their process performance and safety by red...