IEDM 2011: Mapping FinFET carrier profiles in 3D

To get a better look at what’s going on inside a FinFET structure, IMEC researchers eschewed the time-consuming process of combining 2D slices, and instead mapped the 3D carrier profiles of FinFETs (2-3nm resolution) using "scanning spreading resistance microscopy" — a progressively shifted gate across multiple identical fins. From that they formed a 3D profile, which allowed them to map electrical resistances and infer charge distribution. It’s a useful technique, they say, to determine how gate underlap, conformality, raised source/drain doping and other issues affect device performance. [Paper #6.1: "3D-Carrier Profiling in FinFETs Using Scanning Spreading Resistance Microscopy"

Next slide: Hollow copper 3D TSVs


Previous slide: FinFETs for sub-20nm SoCs

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <s> <strike> <strong>

NEW PRODUCTS

SEMI-GAS Xturion Blixer enables on-site blending of forming gas mixtures
10/03/2017The Blixer provides a cost-effective alternative to purchasing expensive pre-mixed gas cylinders by enabling operators to blend ...
Automated thickness measurement system speeds production
09/20/2017ACU-THIK is an automated thickness measurement tool incorporating dual contact probes for high accuracy inspection of semiconductor wafers....
3D-Micromac launches the second generation of its high-performance microcell OTF laser systems
04/17/2017The high-performance production solution for Laser Contact Opening (LCO) of PERC solar cells achieves a th...