IPC, JEDEC devise package strain test

December 15, 2011 — Grid-array packages — ball grid arrays (BGA), land grid arrays (LGA), column grid arrays (CGA) — are getting larger, and as such as susceptible to mechanical stresses from handling, assembly onto PCBs, and test procedures. IPC and JEDEC created


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <s> <strike> <strong>



Edwards launches new Smart Thermal Management System at SEMICON Europa 2016
10/25/2016Smart TMS helps semiconductor, flat panel display and solar manufacturers improve their process performance and safety by red...
Tektronix introduces Keithley S540 power semiconductor test system
10/19/2016Tektronix, Inc., a worldwide provider of measurement solutions, today introduced the Keithley S540 Power Semiconductor Test System, a ...
Novel Wafer Analyzer for up to 300mm wafer using high speed Raman Imaging Technology
08/08/2016Nanophoton introduces RAMANdrive - a new Wafer Analyzer - for a wide range of applications at semiconductor market a...