Semiconductor packaging houses gain from more device complexity

January 11, 2012 — Increased I/O density on chips, power/performance requirements, yield/cost requirements and form factor constraints (mobile) are coming to push increased use of flip chip, 2.5D and 3D technologies. This trend benefits the packaging subcontractors in the semiconductor industry, argues Credit Suisse Taiwan Analyst Randy Abrams, as outsourcing rises.

Larger packaging subcontractors, like Amkor (AMKR), ASE, and SPIL, will take market share from smaller sub-contractors, Credit Suisse predicts. Large packaging houses like Amkor have invested in 3D packaging technologies, such as through silicon via (TSV) fabrication, silicon interposers, etc. They are also well-positioned for an industry shift occuring from wire bonding to flip chip, which enables higher I/O density.

Credit Suisse reports that the flip-chip trend has led to under-utilization of traditional wirebonder assets. Even if these assets are fully depreciated, they often carry fixed costs (labor, overhead). Amkor is responding to this trend by trying to penetrate the NAND market for wirebonding. It also is in talks to purchase old packaging assets from Toshiba. ASE and SPIL are migrating their capacity aggressively from gold to copper wire. ASE is also courting Japanese IDMs to outsource their discrete low-pin count in-sourced packaging needs.

The packaging houses will need to watch for foundry TSMC, which has made special references to chip on wafer on silicon (CoWoS) in its last earnings call, Credit Suisse notes. ElectroIQ.com contributor Dr. Phil Garrou reports that TSMC pushes for a pure foundry model for 2.5 and 3DIC — quoting Doug Yu, senior director of integrated interconnect, TSMC who said that TSMC was readying to take on full beginning-to-end interposer manufacturing. Read Garrou’s TSMC repeats call for foundry-centric 2.5/3D industry. Credit Suisse asserts that fabless chip companies may prefer the packaging houses over a foundry-based 3D packaging model, and companies will leverage various chip and foundry suppliers for the best commercial position, mixing and matching chips in 3D packages.

Other than the foundry encroachment, semiconductor assembly & test service (SATS) providers need to watch out for cyclical weakness in semiconductors, due to the inventory correction in H2 2011, Credit Suisse points out. Improving cyclical momentum through the year will improve absorption of wirebonder capacity discussed above, the analysts note.

Learn more about Credit Suisse at www.credit-suisse.com/global/en/.
 
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