SEMICON West 2012 exhibits preview: Lithography focus

June 27, 2012 — SEMICON West is taking place July 10-12 at the Moscone Center in San Francisco, CA. Following are new products for the lithography step of semiconductor manufacturing, including photoresist coaters and ashers.

 

Microoptics-based homogenizers in CaF2

Jenoptik is demonstrating its manufacturing capabilities for micro-optical structures in CaF2, especially for 193-266nm wavelengths, presenting various CaF2 homogenizer arrangements. Homogenizers, such as microlens arrays or diffractive optical elements (DOEs), are used in optical systems of semiconductor and flat panel display manufacturing and inspection equipment to help define the distribution of light over a particular area in a certain plane of the optical beam path. CaF2 boasts a high damage threshold. Jenoptik uses an advanced micro-structuring process with grayscale technology and a sophisticated wafer-level etching process to fabricate customized refractive, diffractive and hybrid structures even with asymmetric shapes and radii. Free geometries are generated, and the microstructuring process is reportedly accurate and reproducible with various beam distribution patterns. Standard manufacturing processes are available for optical materials such as SiO2, GaAs, GaP, Al2O3, ZnS, ZnSe, Ge, Chalcogenide, etc. Qualified testing at operating wavelength guarantees the quality of optical product properties. Jenoptik Optical Systems division, South Hall, Booth 1641.

 

Photoresist coaters

Spintrac Systems will exhibit innovations in photoresist coater technology including centering, dispensing and indexing. Many of the company’s systems work in a 24/7 production environment while others are utilized in R&D facilities in nanotechnology, flat panel displays and process chemicals. Spintrac Systems has made innovations in its photoresist coating equipment including patent-pending dual-wafer centering for quick substrate size changes; self-centering, self-calibrating Traversing Dispense Arm (TDA) for accurate positioning and unique dispensing capabilities; and proprietary indexer for compact footprint and reduced maintenance.  Spintrac Systems, Inc., formerly SITE Services, Booth 2346.

 

New technology advances and manufacturing methods

SEMATECH and International SEMATECH Manufacturing Initiative (ISMI) will report their latest advances in new materials and device structures and lithography with a special focus on addressing key opportunities and challenges in 3D interconnect technology. Raj Jammy, SEMATECH’s vice president of Materials and Emerging Technologies, “Emerging Semiconductor Technologies – a Heterogeneous World on Silicon,” July 10 at 10:30 a.m. Paul Kirsch, SEMATECH’s director of Front End Processes, “Challenges and Opportunities in High Mobility Ge/III-V Channels and Devices,” July 10 at 2:10 p.m. Stefan Wurm, SEMATECH’s director of Lithography, “EUV Lithography: Remaining Challenges to HVM Introduction,” July 11 at 10:30 a.m. Bill Ross, ISMI’s project manager, “Tool Obsolescence and Sustaining Legacy Manufacturing,” July 11 at 1:40 p.m. SEMATECH, international consortium of leading semiconductor device, equipment, and materials manufacturers, South Hall, SEMICON West TechXPOT Stage.

 

Photoresist asher

SPEC Equipment has developed a new PC-based system for the classic GaSonics photoresist asher. The SPEC 3510 PC replaces the legacy GaSonics L3510 with improved performance and efficiency. The 3510 PC is a downstream photoresist removal system that utilizes time-tested process hardware components, while replacing legacy control items and other obsolete devices and hardware. It offers a newly designed contemporary control system, a full-color GUI, real-time graphing, and saved data recall. Users have access to full diagnostic software, real-time graphics and feedback, and unlimited process recipes with a SECS II interface. Field upgrades take about 4 hours. The new system is capable of up to 4 MFCs. It features 75-200mm wafer capabilities; GaAs, sapphire, and silicon. SPEC Equipment, Booth 647.

 

Lithography for monolithic 3D integration

Monolithic 3D has invented several techniques to obtain monolithic 3D integration with crystalline silicon transistors and copper wires at the most advanced lithography. 3D Repair and Redundancy enables reliable operation for systems with multiple logic and delay defects, and can provide a high tolerance for soft errors and field repair. Ultra large system integration can be achieved without prohibitive yield issues. Monolithic 3D’s Gate Array IC technology can be applied to producing a monolithically stacked single crystal silicon wafer scale Continuous Array with custom, etched scribelines. Chiplets can be added with functions such as I/O and analog. Monolithic 3D, Booth 6775.

Check out more exhibits previews, for front-end wafer fab tools and wafer handling products, back-end packaging products, and more.

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