2012 ITRS stabilized for front-end, but changes loom for 2013 In a session at Semicon West 2012, Intel’s Alan Allan, International Roadmap Committee (IRC) discussed the evolution of the International Technology Roadmap for Semiconductors (ITRS) front-end process section. “The overriding message for 2012 is that the roadmap has been largely stabilized with the significant changes that were input last year in the 2012 publication,” said Allan, who is part of the committee that puts together the Overall Roadmap Technology Characteristics (ORTC) chapter and the Executive Summary. Large changes are 2013, however, are expected. “In the case of logic, a fairly a significant update and presentation of models has resulted in a structure that drives grand challenges and solutions. That was stabilized in the 2008/2009 timeframe and has served us well for the last couple of cycles. That will be evaluated this year for possibilities of adjustment in 2013,” he said. More from the ITRS updates: 2012 ITRS update: Back-end packaging and MEMS Roadmapping More than Moore: When the application matters He noted that, for the most part, the targets for dimensional scaling and the power/performance management of leading devices, are set primarily by gate length in conjunction with equivalent scaling – things like strain, high-k metal gate and now the new multi-gate FET – which work in combination to manage power and performance. iSimilarly, In the case of dynamic RAM, aggressive changes were made last year to take into account rapid acceleration of technology in DRAM and flash. “We do a survey every year amongst the members to check on the status as well as the long range driver outlook,” Alan said. “This year, the big change in looking out in time has to do with the 3D layers (i.e., 3D NAND). “We’re stacking up chips inside devices, so there’s 3D mechanical stacking that’s occurring in chips today. What we’re looking for in 2016 is actually the layer stacking of manufactured flash layers that will be as many 8-16 layers of those bits that will begin to be stacked in a process at the chip level. In the future, that’s projected to go up to 128 and 256 layers. You can imagine the ability to have a very high equivalent density in storage on a flash device in that timeframe,” he said. Further work on that is in the roadmap now and options are presented, but that will also be examined going forward for possible changes in 2013. “You can imagine the number of masks increase dramatically and the costs associated with that increase dramatically,” Allan said. The 450mm transition is also being examined, not only in the domestic USA side with the work in Albany, but the work underway in Europe at imec, to do their similar pathway of 450mm. Allan also emphasized the importance of More-than-Moore, showing a “shopping list” of the things that will be worked on this year that will be delivered at the December Hsinchu Taiwan public conference that kicks off the work for the 2013 roadmap. Overall, expected changes will be based on work in the logic area, but the surveying and updating of memory and the progress of lithography, which Allan described as significant and progressing. He also noted new work to address max on-chip frequency, which has to be addressed with intrinsic transistor modeling. “Work with Purdue University this year to go from static modeling into the realm of dynamic TCAD modeling that will also be represented publicly,” he said. One notable change in the roadmap relates to how it is determined that a given technology is in volume production. “The whole point (of the ITRS) is to guide the research and development that prepares suppliers to deliver the early tools, early materials, that can get us into the early production level,” Allan said. “Sometimes a company will be ahead of others in a particular advancement, and they’ll be following a different pathway. That has caused us to rethink the requirement for two companies to be out within a couple of months or six months of each other (to defined HVM). A leading company can be in production with significant volume, and we use that now as the timing, even if the fast followers come along a year or two later, because the supply chain can still count on significant manufacturing opportunity sales for those technologies,” Allan said.