Roadmapping More than Moore: When the application matters

July 13, 2012 — SEMICON West, this week in San Francisco, CA, hosted 3 TechXPOT sessions on the International Technology Roadmap for Semiconductors (ITRS, 2012 update. At the back-end technologies session, roadmapping for More than Moore was addressed as both a philosophical and technical matter.

Also read: 2011 ITRS: DRAM, 3D Flash, MEMS, nano-scaling steal the show

Introducing the back-end-focused working group presentations, Bob Doering, representing the Overall Roadmap Technology Characteristics (ORTC), said that the Roadmap is not just about scaling anymore. Patrick Cogez, presenting More than Moore, picked up this thread, saying that the long-time focus on semiconductor scaling now has a partner, diversification, in More than Moore process technologies. More than Moore — encompassing advanced wafer-level and 3D packaging, micro electro mechanical systems (MEMS), and related microelectronics technologies — are harder to roadmap than CMOS technologies. Scaling semiconductor nodes has always offered the combined benefits of faster, cheaper, smaller, lower-power chips (Moore


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