imec announced two research collaboration efforts to advance STT-MRAM technology, an alternative high-density memory technology. The developments include working with Canon Anelva Corp. on its deposition tool and working with Tokyo Electron (TEL) on its Tactras etch tool, both installed in imec’s 300mm cleanroom.
STT-MRAM is spin-transfer torque magnetoresistive random access memory. Imec’s STT-MRAM program, launched in November 2011, is intended to explore performance beyond 1ns and scalability beyond 10nm for embedded and standalone applications.
Canon Anelva Corp., a supplier of processing equipment for the semiconductor device manufacturing industry, and imec will collaborate on the establishment of the baseline process for magnetic tunnel junctions (MTJs), joint R&D on thin film deposition and stack engineering for high-density STT-MRAM, and the development of integrated STT-MRAM devices.
Tokyo Electron (TEL) http://www.tel.com, a supplier of semiconductor production equipment, and imec are extending their collaboration and will be working on TEL’s Tactras etch tool, which complements imec’s 300mm dedicated STT-MRAM tool set. The Tactras tool enables imec and TEL to jointly develop the patterning processes for high-density STT-MRAM technology. The tool is designed for in-situ cluster patterning of the magnetic tunnel junction (MTJ) stack, which is key for advanced memory technology nodes.
Last month, TEL joined imec’s bio-research program Human++