The creation of test patterns for mixed signal IP has been, to a large extent, a manual effort. To improve the process used to test, access, and control embedded IP, the new IEEE P1687 standard 1 is being defined by a broad coalition of IP vendors, IP users, major ATE companies, and all three major EDA vendors. This new standard, also called IJTAG, is expected to be rapidly and widely adopted by the semiconductor industry. The P1687 standard will enable the industry to develop test patterns for IPs on the IP level without having to know how the IP will be embedded within different designs. Mentor Graphics and NXP Semiconductors (NXP) worked together to implement P1687 on mixed-signal IPs in a 65 nm automotive design. The results demonstrate the significant advantages of P1687 over the current IEEE 1149.1 (JTAG) 2 test methodology, both in automating the test pattern development and in reducing test setup data volume by more than 50%.
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