Sidense qualifies 1T-OTP non-volatile memory for MagnaChip 180nm mixed-signal and HV CMOS process MagnaChip Semiconductor Corporation, a Korea-based designer and manufacturer of analog and mixed-signal semiconductor products, and Sidense Corp., a developer of logic non-volatile memory one-time programmable (OTP) memory IP cores today announced that Sidense’s SLP 1T-OTP macros have been fully qualified for MagnaChip’s 180nm 1.8/3.3/18V high-voltage CMOS and mixed-signal process. Semiconductor devices fabricated in these processes are used in applications such as LED lighting controllers, display controllers and power-management ICs (PMICs) for mobile and other high-volume applications. "Leading semiconductor device manufacturers are already using Sidense 1T-OTP macros for LED energy management solutions fabricated using MagnaChip’s leading process technology," said Tom Schild, Sidense’s Vice President of Worldwide Sales and Marketing. "By offering our very dense and low-power SLP memory macros in MagnaChip’s HV process, customers have a proven platform in which they can take full advantage of the benefits of 1T-OTP memory and its cost-effectiveness, reliability and security advantages over eFuse, mask ROM and other NVM technologies." SLP macros are available in a comprehensive range of off-the-shelf configurations ranging from 128 bits for trim and configuration applications up to 256 Kbits per macro for code storage and multiple NVM uses. Benefits of Sidense’s SLP OTP include small footprints to minimize cost, low power consumption, field-programmability, available configurations with word widths up to 128 bits and fast read access to allow executing code from OTP for many applications. Headquartered in South Korea, MagnaChip Semiconductor is a Korea-based designer and manufacturer of analog and mixed-signal semiconductor products for high volume consumer applications. Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required. Sidense SiPROM, SLP and ULP memory products, embedded in more than 250 customer designs, are available from 180nm down to 28nm and are scalable to 20nm and below.