Studying 1/f noise Welcome to the first of what I expect will be many blogs from ProPlus Design Solutions. While our name may be new to readers of Solid State Technology, we are known by the foundries as their supplier of device modeling software. We’re expanding our product portfolio and our industry presence, and a key reason why we jumped at the chance to blog for SST. The topic of this blog is on-wafer measurement for flicker noise, a.k.a., 1/f noise, an engineering challenge I’ve been studying for more than 10 years, motivated by the needs of wafer fabs and circuit designs. 1/f noise is an important characteristic for various semiconductor devices, such as MOSFETs, BJTs, JFETs, Diode, and IC resistors. Not only does it directly impact the circuit performance of modern ICs, but it has been used also as an important technique to characterize the manufacturing process quality. In recent years, on-wafer noise measurement has been done more often in massive volume by many of the foundries. SPICE models are built, often with statistical corners, to enable circuit designers to accurately analyze the impact of noise on circuit performance, especially for RF, low noise, and highly sensitive devices. However, accurately measuring flicker noise at the wafer level is challenging and time consuming, mostly due to the noisy probing environment, accurate DC bias requirement, and complicated cable connections. This creates a strong need to improve wafer-level noise measurement systems and methods to validate noise data. Noise is a figure of merit for semiconductor process quality and characteristics impacting circuit performance today. Just like so many areas in our industry, process technologies at 28nm and beyond are calling for new tools and methodologies or significant improvement to existing tools. Noise data indicates how good the oxide and interface layers are. From it, fab process engineers can evaluate the related process quality and variations, and modeling engineers can build noise models. Then, circuit designers can simulate the impact of 1/f noise variation on analog or RF designs, or how the increasing RTS at advanced nodes reduces SRAM design margins. Advanced wafer fabs use 7*24 1/f noise measurement data to assess process quality with the decades old 9812B wafer-level, 1/f noise measurement system. While it may be the industry’s de facto standard, it’s showing its age. Circuit designers worry about variation effects at leading-edge process nodes, increasing the need for statistical noise models. Generating statistical noise models requires massive amounts of data collection at low frequencies. In some circumstances, when the 1/f noise corner frequency is high of greater than 1MHz, designers are expecting to see noise data at higher frequencies. However, in a noise measurement system, there is a trade-off between system resolution and frequency bandwidth. In fact, in most commercial systems with only voltage LNAs, measuring MOSFET noise at frequencies higher than 1MHz on the wafer level, especially in the weak inversion region that is critical to analog designs, is practically impossible due to system gain roll-off. Accuracy is a key requirement for on-wafer noise measurement. Noise is statistical in nature, and usually its magnitude is in the pA range. Measuring such a signal for devices on-wafer is challenging, especially when considering different device types at different bias conditions. The measurement accuracy relates to many factors, such as the system capability, measurement instruments, cables and environment. With all the new challenges and requirements discussed above, I’m advocating mothballing 9812B with a faster and more accurate system able to provide more accurate data collection in the range of 1Hz to 10MHz. This next-generation low-frequency 1/f noise measurement system is able to measure low-frequency noise characteristics of on-wafer or packaged semiconductor devices, including MOSFETs, SOI/FinFET, BJT/HBT, JFETs, TFT, diodes and diffusion resistors. On-wafer noise is a fascinating subject and one I enjoy talking about. I also manage a talented R&D team at ProPlus that has built 9812D, the latest generation wafer-level, 1/f noise measurement system, a product we introduced earlier this year. I’m hosting a 60-minute webinar May 14 titled, “Accurate and Efficient Wideband On-wafer Flicker (1/f) Noise Measurement.” Of course, I’ll talk about 9812D, but it will be a discussion on noise issues at 28nm and below nodes. The webinar is open to anyone interested in the topic, including academics, engineers and engineering managers who want to improve on-wafer noise measurement quality. For more information or to register, go to: http://tiny.cc/vcmdww.