Monolithic 3D chip fabricated without TSVs

An alternative to scaling is to expand vertically, by thinning, stacking and interconnecting ICs, commonly called 3D integration. Chip-to-chip Interconnections are are typically made with through-silicon vias (TSVs), but some TSVs also have major disadvantages, including relatively large dimensions, parasitic capacitances and thermal mismatch issues.

At the upcoming International Electron Devices Meeting (IEDM) in December, researchers from Taiwan’s National Nano Device Laboratories avoided the use of TSVs by fabricating a monolithic sub-50nm 3D chip, which integrates high-speed logic and nonvolatile and SRAM memories. They built it from ultrathin-body MOSFETs isolated by 300-nm-thick interlayer dielectric layers.

To build the device layers, the researchers deposited amorphous silicon and crystallized it with laser pulses. They then used a novel low-temperature chemical mechanical planarization (CMP) technique to thin and planarize the silicon, enabling the fabrication of ultrathin, ultraflat devices. The monolithic 3D architecture demonstrated high performance – 3-ps logic circuits, 1-T 500ns nonvolatile memories and 6T SRAMs with low noise and small footprints, making it potentially suitable for compact, energy-efficient mobile products.

The process flow used to fabricate the 3D IC without TSVs.

The process flow used to fabricate the 3D IC without TSVs.

 A TEM electron microscope view of the 3D chip.

A TEM electron microscope view of the 3D chip.

 

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

One thought on “Monolithic 3D chip fabricated without TSVs

  1. Pingback: Scaling Makes Monolithic 3D Practical | Semiconductor Manufacturing & Design Community

Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <s> <strike> <strong>

LIVE NEWS FEED

NEW PRODUCTS

Versatile high throughput SEM from JEOL
11/04/2015JEOL's new JSM-IT100 is the latest addition to its InTouchScope Series of Scanning Electron Microscopes....
Entegris expands CMP filtration technology solutions and research, analytical and manufacturing capabilities
09/04/2015The Entegris filter platform using NMB media now includes the Planargard bulk, Solaris point...
DCG Systems extends circuit edit capability to the 10nm node with the introduction of OptiFIB Taipan
09/02/2015DCG Systems today announces the release of the OptiFIB Taipan circuit edit solution for the most adv...