ARM and global semiconductor foundry UMC this week announced an agreement to offer the ARM Artisan physical IP platform along with POP IP for UMC’s 28nm high-performance low-power (HLP) process technology.
UMC and ARM will provide an advanced process technology and comprehensive physical IP platform under this agreement, with the goal of supporting customers targeting a wide range of consumer applications such as smartphones, tablets, wireless and digital home services.
“UMC’s ‘United for Excellence’ approach includes unified collaboration with our IP suppliers to deliver high-value design support solutions to our foundry customer,” said S. C. Chien, vice president, IP and Design Support Division, UMC. “UMC’s 28nm dual process roadmap includes both poly SiON and high-K/metal gate-based technologies. 28HLP is the foundry industry’s most competitive Poly SiON 28nm technology in terms of power consumption, performance and area, with a robust design platform to help expedite our mobile and communication customers’ time-to-market. We are excited to broaden our collaboration with ARM to further strengthen our 28HLP platform with ARM’s highly popular POP IP core-hardening acceleration technology.”
The energy-efficient ARM Cortex-A7 processor has seen broad adoption in smartphones, tablets, DTV and other consumer products. The ARM POP IP for the Cortex-A7 processor is targeted for 1.2GHz on UMC’s 28HLP platform, and delivery began in December 2013.
UMC’s 28HLP process is the foundry’s enhanced 28nm Poly-SiON technology that provides an optimal balance of size, speed and power leakage. These process characteristics makes the process the optimal choice for a variety of applications that require low power consumption without compromising performance, including portable, wireless LAN, and both wired and handheld consumer products. The foundry is currently in pilot production for customer products on 28HLP, with volume production expected in early 2014.
“Through our close collaboration with UMC, ARM’s physical IP and POP IP enable optimal SoC implementation and streamline the design flow so that our mutual customers can achieve world-class implementation and get to market in the shortest time possible,” said Dipesh Patel, executive vice president and general manager, Physical Design Group, ARM. “Our standard cells, next-generation memory compilers and POP IP deliver the features, quality, and rigorous silicon validation that UMC’s customers demand, and help ARM deliver on our commitment to provide the best physical IP platforms at leading foundries.”
ARM Physical IP Platform
The ARM Artisan physical IP platform for UMC’s 28nm poly SiON process provides the building blocks to implement high-performance, low-power SoC designs. ARM’s silicon-proven IP platform offers a comprehensive set of memory compilers, standard cells and logic, and general-purpose interface products that meet the most demanding performance and power requirements for mobile communications and computing.
ARM’s standard cell libraries and memory compilers incorporate multi-channel and mixed Vt features to enable a wide performance and power spectrum which utilizes the performance and power range of UMC’s leading-edge poly SiON process. These features ensure that power budgets for performance-critical SoC designs can be met.
POP IP technology
POP IP technology comprises three key elements necessary for optimized ARM processor implementation. These include Artisan physical IP logic libraries and memory instances tuned for a given ARM core and process technology, comprehensive benchmarking reports pinpointing conditions and results ARM achieved for core implementation, and detailed POP implementation knowledge and methodologies that enable end customers to achieve successful implementation quickly with minimized risk. POP IP products are available from 40nm to 28nm with roadmap down to finFET process technology for a wide range of Cortex-A series CPU and Mali GPU products.