eInfochips opens new design services specializing in 16nm geometry

eInfochips, a semiconductor and product engineering company, today launched design services for chips based on 16nm geometry.  The comprehensive suite of services includes Netlist to GDSII, Sign-off, and Design for Testability. eInfochips is one of the few engineering services companies in the world capable of delivering 16nm chip designs which reduce a chip’s power consumption by half, while improving performance by one-third over 28nm technology.

According to Frank Berry, Senior Analyst at IT Brand Pulse, “Transitioning to 16nm technology is risky and expensive. Engineering services organizations with 16nm design expertise will play an important role in helping product companies mitigate the risk, and reduce the cost of the transition.”

16nm chips will power a new generation of products that are smaller, require less power and run faster. A recent TSMC report suggests that 16nm FinFET technology will achieve 55 percent power reduction and 35 percent higher speed as compared to the standard 28nm HK/MG planar process.

In conjunction with TSMC’s announcement to support volume production at 16nm, eInfochips says it is taping-out 16nm FinFET chips for a leading semiconductor design company. That means the eInfochips design team possesses rare hands-on experience using leading EDA Tools across the silicon development cycle. The eInfochips team is also one of the few that have addressed implementation, flow enhancement (including double patterning) and Design Rule Check (DRC) errors at 16nm geometry.

“Mastering chip design at smaller geometries can only be achieved through hands-on experience.” said Parag Mehta, Chief Marketing and Business Development Officer at eInfochips. “Today, eInfochips is one of the few companies in the world that can say they have experience at 16nm.”

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