Cadence Design Systems, Inc. today announced plans to acquire Jasper Design Automation, Inc., a provider of formal analysis solutions, for approximately $170 million in cash. Jasper had approximately $24 million of cash, cash equivalents and short-term investments as of December 31, 2013.
Cadence intends to finance the transaction with available cash and an existing revolving credit facility. The transaction is expected to close in the second quarter of fiscal 2014, subject to customary closing conditions including regulatory approvals. Cadence expects the transaction to be accretive to its non-GAAP earnings per share in fiscal 2015 after the impact of merger-related accounting. The impact on fiscal 2014 non-GAAP earnings per share will be provided when Cadence reports its second quarter fiscal 2014 financial results. The impact on GAAP earnings per share will be available after the completion of valuation and purchase accounting.
Jasper Design Automation provides multiple verification solutions (Verification Apps) built on the JasperGold platform. Jasper’s customers include many of the top systems, semiconductor and IP companies. These companies, which are also Cadence customers, are increasingly adopting formal analysis to complement traditional verification methods, so as to better address the challenge of verifying increasingly complex and flexible IP designs and systems-on-chip (SoCs). With verification representing over 70 percent of the cost of developing a system-on-chip, it has become the top system and SoC development challenge and is the critical factor for time-to-market.
In its official release, Cadence said Jasper’s technology strengths are complementary to its System Development Suite. Cadence intends for Jasper’s technology to be tightly integrated with Cadence’s common debug analysis, formal and semi-formal solutions, simulation, acceleration, emulation and prototyping platforms, while leveraging its unified verification planning and metric-driven verification flow. In addition, the combination of extensive dynamic and formal VIP portfolios will be particularly well suited to enable embedded processor system verification.
“Jasper’s products are recognized as the technology leaders in formal analysis, targeting complex verification challenges and increasing overall verification productivity,” said Charlie Huang, senior vice president of the System & Verification Group and Worldwide Field Operations at Cadence. “Jasper’s formal analysis solutions are used by customers today alongside Cadence’s metric-driven verification flow to form a broad verification solution. We look forward to welcoming Jasper’s strong formal development expertise and skilled team to Cadence.”
“Jasper and Cadence serve top-tier customers that will benefit from expanded formal technology and a broader, tightly-integrated verification solution,” said Kathryn Kranen, president and CEO of Jasper. “The verification technologies, when combined, will benefit customers through a comprehensive metric-driven verification approach that unites formal and dynamic techniques, realizing the strength of each and leveraging the integration between them.”