Metrology and Failure Analysis

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Metrology

DateNovember 12, 2014 at 12:00 p.m. Eastern

Free to attend

Length: Approximately one hour

The next move in metrology and defectivity for the semiconductor industry

The semiconductor industry today is showing two major trends, as we are approaching the end of the Moore’s Law era.  First, the complexity of the process flow used to make a device has increased extremely fast in recent years.  Second, market demands extend beyond the device to the system, which integrates different functions to achieve a task, leading to 3D integration approaches. The presentation will cover our vision of the consequences of those trends in metrology and defectivity requirements. Carlos Beitia is the Metrology and Defectivity Manager, CEA-Leti, will present: the use of more and more in-lab characterization to complement in-line metrology; the need to combine measurements whether to improve uncertainty in a given parameter or improve knowledge of the object under study; the need for in-die characterization that provides information to complete the picture at transistor and wafer level; 3D integration problems, and more.

Processes for Failure Analysis

Winfield Scott, the Director of Technology at Evans Analytical Group, will present an overview of the failure analysis process as it relates to advanced process technologies will be presented. Layout dimensions are much smaller than the wavelength of light which means transistors cannot be seen with optical microscopes. Many defects appear ‘invisible’ and result in degraded transistor performance instead of opens or shorts. The presentation will include: The failure analysis (FA) methodology and flow; Localizing the failure and identifying the failure site; Localization tools LIVA, TIVA, XIVA, OBIRCH, EMMI, IR, SQUID, LTP; and an example of nanoprobe and TEM.

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Speakers:

wscottWinfield Scott, Technology Director, Evans Analytical Group

Winfield Scott is the Director of Technology at Evans Analytical Group and has the responsibility to ensure EAG has the tools and techniques to keep up with the advances in semiconductors and electronic packaging. He has been using FA to help solve problems for over 40 years. In addition to EAG, he has worked for Motorola, Western Digital, andSperry Flight Systems.

CarlosCarlos Beitia, Metrology and Defectivity Manager, CEA-Leti

Dr. Carlos Beitia received a Ph.D. in material science from Paris 7 University in France. He joined the CEA in 2009 as the scientific manager of the metrology laboratory in Leti’s Silicon Technology Department. Since 2011, he has been the metrology-and-defectivity manager. Previously, he worked for eight years as application engineer at KLA-Tencor focused on advanced metrology applications for worldwide semiconductor fabs. He participates in and leads activities for Leti in several European programs linked to metrology challenges of the semiconductor industry (SEA4KETs, Master 3D, Polis). He is member of the ITRS metrology working group and theFrench Nanometrology Club. His actual field of research is in metrology in optical profilometry and AFM for surface nanotopography and surface functionalization.

About the sponsor: 

Bruker Nano Surfaces is the world’s leading supplier of probe based metrology & failure characterization systems supporting the semiconductor industry with fully automated Atomic Force Microscopes and AFM probes designed specifically to address CD, depth and CMP metrology in a production environment. Come see how Bruker’s unique PeakForce Tapping capability for FinFETs, 3D-NAND and EUV lithography can help solve your critical process problems by providing unparalleled accuracy and precision. Find out more at www.bruker.com/afm.

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