Hybrid Memory Cube Consortium releases new specification

The Hybrid Memory Cube Consortium (HMCC), dedicated to the development and establishment of an industry-standard interface specification for Hybrid Memory Cube (HMC) technology, announced the finalization and public availability of its HMCC 2.0 specification (HMCC 2.0).

The new HMCC 2.0 specification advances data rate speeds from 15 Gb/s up to 30 Gb/s, establishing a new threshold for memory performance. HMCC 2.0 also migrates the associated channel model from short reach (SR) to very short reach (VSR) to align with existing industry nomenclature.

“With 150 members, the Hybrid Memory Cube Consortium has gained considerable momentum since its inception and, as a result, has more and better inputs on how the interface can best fit tomorrow’s applications,” said Jim Handy, director, Objective Analysis. “The release of the HMCC 2.0 specification shows a commitment to evolving a family of specifications targeting all high-performance computing applications.”

The HMCC was founded in October 2011 by co-developers Altera, Micron, Open-Silicon, Samsung Electronics and Xilinx. The HMCC finalized and released its first specification in May 2013, demonstrating consensus among leading semiconductor developers to drive adoption of HMC into next-generation systems. Since its establishment, the HMCC has grown to include more than 150 OEMs, enablers and integrators who regularly participate in the development and discussion of HMC standards. Finalization of the second generation of HMCC specifications is a key milestone in the development of this innovative memory technology and an indication of its continued adoption.

“HMCC 2.0 gives designers a mature solution for breaking through memory bottlenecks and delivering a new generation of systems with unprecedented memory performance,” said Hans Boumeester, Open-Silicon’s vice president of IP and engineering operations. “Ratification of the new standard means that these designers will have access to standards-compliant IP for immediate integration into chips and systems that meet the growing bandwidth demands of next-generation data center and high-performance computing applications.”

POST A COMMENT

Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.

Leave a Reply

Your email address will not be published. Required fields are marked *

You may use these HTML tags and attributes: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <s> <strike> <strong>

LIVE NEWS FEED

NEW PRODUCTS

Astronics Test Systems announces new PXIe test instruments
01/24/2017Astronics Corporation, through its wholly-owned subsidiary Astronics Test Systems, introduced two new test instruments today. ...
Edwards launches new Smart Thermal Management System at SEMICON Europa 2016
10/25/2016Smart TMS helps semiconductor, flat panel display and solar manufacturers improve their process performance and safety by red...
Tektronix introduces Keithley S540 power semiconductor test system
10/19/2016Tektronix, Inc., a worldwide provider of measurement solutions, today introduced the Keithley S540 Power Semiconductor Test System, a ...