MRAM lowers system power

BY BARRY HOBERMAN, CEO, Spin Transfer Technologies

ST-MRAM (spin-transfer magnetic RAM) is an extremely promising new technology with the potential to replace major segments of the market for flash, SRAM, and DRAM semiconductors in applications such as mobile products, automotive, IoT, and data storage. With ST MRAM technology, data is stored in minute magnetic nodes—a physical mechanism different from traditional non-volatile memory (NVM). MRAM technology fundamentally requires less energy to use, and features like byte-addressability that further contributes to energy efficiency.

Embedded MRAM primarily fills the role that is currently handled by embedded NOR flash: storage of code and data that must survive when the power is removed. Indeed, MRAM is challenging NOR flash due to overall lower power and byte-addressability.

Energy consumption starts with voltages and currents: their product yields the power of the device – that is, the rate of energy consumption. Lower voltages and currents mean lower power. Energy consumed is determined by how long that rate is sustained – power multiplied by operating time. Therefore speed, the ability to finish a job sooner, also contributes to lower energy consumption especially when devices can enter sleep mode after tasks are complete.

To understand how NOR flash consumes energy, we need to look at how it operates. Let’s say we have a 32-bit word whose value we wish to update. With NOR flash, you can store data only in locations that have been freshly erased. This means you have to erase the old value before you can write the new value.

But there’s a more significant challenge; you can’t just erase those 32 bits. NOR flash can only be erased in sectors. So, in order to update those 32 bits, you have to find a new place to write them. This means creating and maintaining pointers to keep track of stored data since, with each update, the data location will move. Eventually, you run out of fresh space, and must perform garbage collection to free up the space used by all the out-of-date instances.

By contrast, MRAM has none of these requirements. Because it is byte-addressable, you can read and write just as you would with SRAM. Those 32 bits that needed updating? You simply write the new value over the old value. MRAM consumes less energy for a number of reasons:

No erase before writing: NOR flash erasure is very slow. With MRAM, there’s really no notion of erasing data; you’re either writing 1s or 0s, in any combination. The need to erase is a key contributor to the energy consumption of a NOR flash device.
Faster, lower-power writing: Not only can MRAM devices be written more quickly than NOR flash (even without considering erasure), the power while writing is also lower. The fact that you can complete the operation sooner means you can put the device to sleep sooner, yet another advantage to lowering energy.

No charge pumps: NOR flash, unlike MRAM, needs high voltages internally – much higher than the voltages at the external power pins. Those voltages are generated by internal charge pumps. Ideally, power would stay the same, but real charge pumps aren’t ideal; their inefficiency means lost energy.
Charge pumps also take longer to power up, and settle after a sleeping device awakens. This increases wake-up times dramatically. MRAM wakes up in nanoseconds to micro- seconds; NOR flash in milliseconds.

No complex storage management: The lack of byte-addressability in NOR flash creates complexity that increases the time to store data and code. Data tables must be maintained, along with the occasional garbage collection. The CPU, or some other circuit, must manage this data storage. These other devices consume energy, so the more time spent managing data, the more energy consumed. This energy consumption doesn’t apply to MRAM technology.

Mixed read/write stream: NOR flash storage operations, due to complexity, mean long lock-out times during writes. No data reading is permitted during these times. If certain pieces of data are quickly needed, then further management may be required to anticipate this ahead of a data write, so the data can be cached. By contrast, MRAM can handle a stream of operations – reads and writes – in any combination.

Staggered writing: Data can be stored 32 bits at a time. While overall energy consumption in doing this is lower for MRAM than for NOR flash, it still might challenge the peak current capabilities of a battery-powered device. The ability for MRAM to break the write into four successive single-byte writes, a feature known as “staggered write,” reduces current demands on the battery.


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