EUVL Focus



2017 SPIE Advanced Lithography – EUVL Conference Update

By Vivek Bakshi, EUV Litho, Inc.

To simplify the vast amount of information from the 2017 SPIE AL EUVL Conference for my blog, I have adopted a new format. It includes a short summary of EUVL Status, a list of notable updates, and additions to the current list of EUVL Challenges (previously published on this site). An additional commentary will follow this blog.

  1. Current EUVL Status 

Source: Current power of 148 W corresponding to 104 wafers per hour (WPH) scanner throughput in-house at ASML. Stable 130 W noted in field. 375 W in lab EUV sources in burst mode at 50 KHz. 200 W of stable power is possible in field in 2017. Source power now meeting requirements for introduction of NXE3400. Current source availability at 75%, needed at >90%. Droplet generators and collector lifetime improving but need further improvement.

Scanners: Fourteen EUVL scanners in field. Four shipped in 2016. 0.3 nm critical dimension uniformity (CDU) and 1.8 nm overlay. 148 W and 104 WPH with increase of 8 wafers per hour (WPH) achieved via increase of stage speed at the same source power.

Masks: Mask blank defects acceptable for now via defect avoidance and repair.

Mask Pellicles: Mask defect addition during manufacturing is still a concern for chip makers. Pellicles are at 125 W and need to be ready for 250 W by 2H 2017. 

Mask Defect Inspection: Samsung has made its own AIMS tool and plans to use it for high volume manufacturing (HVM). Tool is using HHG based EUV source and a scanning zone plate. Zeiss is now shipping its first AIMS tool. Actinic Patterned Mask Inspection (APMI) tool still missing. Mask defect inspection via wafer inspection for now, at a cost and with lower yield. APMI is only red flag item for 7 nm insertion of EUVL. 

Resist: Lots of talk about stochastics, but I believe it will be addressed and it is not a showstopper. Important to note that resist image is only an intermediate step and there are still several knobs available to improve the performance of the final circuit – which is what matters.

  1. Notable Updates 

Scanner and imaging

  • Increase of throughput by 8 WPH via greater stage speeds is first such increase, with more to come. Now expect source power of 210 W to give 125 WPH instead of 250 W (increase in throughput via stage speed improvement)
  • Extension of EUVL to low k1 may be more difficult than for 193i. Discussion of various factors and how to address them has started.
  • More enthusiasm for high NA scanner, as it can help with line width roughness (LWR) and extension to lower k1. Detailed checklist of High NA challenges from Samsung.
  • Data showing that around 5 sigma errors deviate from standard distribution. We do not understand error distribution behavior at 5 to 7 sigma (it is no longer a normal distribution). We now need to print one trillion vias in one exposure with no open! 3 sigma is no longer enough.
  • Closer cooperation among litho, etch and deposition is the way to reduce EPE and address stochastics. Work has already started.
  • Scanner to scanner variation higher for EUVL than for 193i. How to address this in optical proximity correction (OPC)? Will this lead to scanner specific EUV masks?

Source

  • Need to better understand source power requirements for 3 nm and beyond. How much additional help we will get from scanner for increasing throughput? Is 500 W enough? Will we need additional power?
  • Power scaling to 500 W is still lots of work and not a done deal as conversion efficiency decreases at higher pulse energy (favored method for power scaling). 

Resist

  • Introduction at 7 nm planned at 20 mJ dose
  • Micro bridging (aka nano bridging) of resist is a new challenge reported by several people. Its relationship to dose, type of resist and LWR is not clear. Some said that this may become bigger than LWR issue. Papers showing OPC and Litho- etch optimization can help reduce this effect.
  • Continued work on chemically amplified resists (CAR), metal based inorganic resists and molecular resists to support 7 nm and beyond.
  • Out of Band (OOB) filter in now in scanner that also acts to keep resist outgassing products out.
  • Sigma alone may be insufficient to characterize LWR. New additional variables needed? 

Mask

  • Replacement of current mask absorbers by Ni to improve imaging. Continued review of new mask structures with improved imaging potential, but patterning challenges exist for these new stacks.
  • Need source mask optimization to address 3D mask effects.
  • High sensitivity to Pellicles defects for small pupil fills imaging
  • Need for further analysis and reduction of defects in the scanner, that end up on masks, generated during manufacturing.
  • Current fixed pellicle design needs to evolve to provide future solutions.
  • New carbon nanotube based pellicles from IMEC
  • New APMI design from PSI/ETH, supported by small synchrotron based EUV source.

New terms heard at SPIE AL

  • Etch Color, CD healing, Black Swans (at seven sigma), Vote-taking Lithography (resurrection of a 1986 idea to move away from 100% defect free mask requirements), nano bridging and micro bridging of resists, and Tone inversion.

Most Interesting Papers

  • Couple of papers on stochastics – Line edge roughness (LER) performance targets for EUVL (10143-10) by Tim Brunner of GlobalFoundries and Lithographic Stochastics – extrapolating to 7 sigma (10143-31) by Robert Bristol of Intel.
  1. Additions to existing list of challenges for EUVL

7 nm

Nothing new

5 nm

Micro bridging of resists

Error distribution at 5-7 sigma 

3 nm

Power scaling to 500 W and beyond

Micro bridging of resists

Error distribution at 5-7 sigma

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