By Dr. Phil Garrou, Contributing Editor
Finishing our look at the 2017 SEMI 3D Summit in Grenoble.
Thibault Bisson of Yole discussed 3D packaging as a key enabler.
Yole predicts a significant increase in the use of sensors in smartphones. While the use of sensors was limited to 3 during the advent of the smartphone in ~2007 (microphone, accelerometer and CIS), by 2021 they expect more than 20 sensors in the advanced smartphones.
Smartphone APU options, their packaging and specs are shown in the chart below.
System Plus Consulting
Romain Faux of System Plus Consulting presented a “technology and cost review of 3D packages in HVM.”
Sys Plus concludes that FOWLP could lead to cost reduction under several conditions:
– In replacement of a chip on board radar chipset.
– In combination with advanced CMOS nodes for single die consumer applications such as baseband, power management, Rf transceivers and/or audio codec solutions.
– in 3D PoP configurations for thin AP + memory solutions.
An interesting comparison is between the 77GHz radar chip sets packaged on COB vs FO-WLP as shown below. One can easily see the miniaturization achieved.
Other HVM FOWLP examples include audio codec, power management ICs, Rf transceivers and Application processors.
Sys Plus projects a 10% cost savings on the audio codec and a > 50% cost savings on the Rf transceiver.
While Amkors TMV is the predominant package for Application processors, he newer technologies such as the MeCP by Shinko and he InFO by TSMC offer better integration and lower package thickness. Specifically, the TSMC InFO package shows a thickness reduction of 30% while eliminating the laminate substrate.
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