By Dr. Phil Garrou, Contributing Editor
SMIC Ups Ownership in JCET
Following the lead of global foundry leader TSMC, SMIC, in two separate moves has put an additional $0.5B into JCET (Jiangsu Changjiang Electronics Technology), mainland China’s largest semiconductor packaging assembly and test business, uping their ownership position to $14.25% and making it the biggest shareholder in JCET. [link].
SMIC used a straight cash investment and it’s subsidiary SilTech Shanghai which agreed to sell to JCET its 19.61 per cent equity interest in semiconductor packaging and test services company Stats ChipPac in exchange for JCET shares. SilTech, JCET and the China IC Industry Investment Fund jointly acquired Stats ChipPac in 2014.
With TSMC and SMIC moving into packaging (as IFTLE has predicted for years) it will be interesting to watch for the response from GlobalFoundries and or UMC.
Continuing our look at the IMAPS Device packaging Workshop
ASE – SiP
Bill Chen’s plenary presentation on SiP contained a nice section on WLP (or WLCSP as it used to be called). IFTLE has recently pointed out that WLP should end up being a very important package for IoT which need very small forma factor and very low cost. [ see IFTLE 268 IMAPS 2015 Part 1: A Comeback for WLP in IoT]
I admit to being very partial to the WLP package since I spent many years in the 1990s working with FCT and Unitive as they created the package and made it an industry standard.
Chen points out that the WLCSP of the 1990s paved the way for may other WL packages as shown below.
Based on Yole data, Chen estimates that todays leading edge smart phones contain ~ 35% WLCSP.
As technology developed to apply WLP to larger and larger die more applications came into reach and more I/O ae available at the same pitch as shown below.
Bunel of IPDIA discussed their “Low profile flip-type or embedded Silicon Capacitors in high speed decoupling and broadband filtering”. Communication applications are requiring compact capacitors with large capacitance and low impedance.
IPDIA silicon capacitor technology is based on the structure shown below which can be built in thin film technology with very low profile.
It is compared to a std MCC (multilayer ceramic) cap below.
The silicon caps are thinner and have a smaller footprint than standard MLCC caps.
The main take away of this paper is that the insertion loss at frequencies above 15GHz is dependent on the environment and the mounting parameters. The comparison between the Silicon capacitor and the MLCC shows that on top of the performances required for the UWBB capacitors, the Silicon capacitors offer a combined solution of low profile, high capacitance and low ESR/ESL to meet the requirements in decoupling applications.
Amkor discussed sputtered copper vs metal can shielding for cell phone components. They contend sputtering is a lower cost smaller footprint solution.
The process flow is shown below.
Excellent shielding effectiveness is achieved, mostly above 30 dB, up to12 GHz for far field and up to 6 GHz for near field, and low frequency from10 MHz-100 MHz. Amkor recommends 3 μm sputtering copper solution for best shielding performance and lowest cost.
Hope to see a lot of you in a few week at the ECTC conference in Las Vegas.
For all the latest on 3DIC and other advanced packaging, stay linked to IFTLE…