Current and future defectivity issues for equipment components and materials
VIBHU JINDAL, SEMATECH, Albany, NY
The Nanodefect Center is tackling the big challenges in particle detection, characterization and mitigation for critical supply chain components and materials.
Changes in the semiconductor equipment and material ecosystem such as scaling of nodes below 20nm, new materials and process integration for sub-20nm node manufacturing, next generation lithography requirements, and progression to the 450mm wafer size require stringent performance specifications be met in a timely manner. The ecosystem is currently facing huge investment gaps where R&D costs are exponentially increasing due to the costly infrastructure necessary to deliver the solutions. This puts tremendous pressure on the component-level supply chain due to continuously changing technology requirements and slow adoption cycles which in turn result in sluggish recovery of high non-recurrent engineering costs.
Industry requirements for some processes, such as EUV lithography, require zero defects above 50nm in size, since these are considered killer defects, and only a few defects can be tolerated between 20nm and 50nm. The defect requirements for other applications are less stringent, though the trends are driving towards less than 10 particles at continuously smaller sizes. The reduction of particles at such small sizes is producing extreme challenges for original equipment manufacturers (OEMs) as they must tightly control the performance of every component within the equipment, in addition to reducing process defects. The component suppliers face additional challenges as they not only have to meet the stringent performance specifications but also must improve performance based on continuously changing process latitudes and chemistries of end users.
One of the biggest challenges with such small defects is inspection and metrology. State-of-the-art inspection tools can find defects down to 25nm on wafers and masks. Inspection tools capable of detecting smaller sizes are not available. Inspection and failure analysis tools that are capable of detecting defect sources below 50nm are enormously costly, which causes a large infrastructure gap for suppliers working in component and material development. Lacking that infrastructure, it is very difficult for many OEMs and subsystem, component and material suppliers to reduce defect sources and improve defect performance.
Additionally, as defect reduction requirements go down to such small sizes, interdisciplinary knowledge is required to understand the defect generation process and later devise removal or mitigation techniques. Therefore, research and learning at such small defect sizes can take longer which increases development time of components and materials. This delay, in turn, affects yield ramps. Such challenges and slow development will put huge pressure on yield learning for end users in a production environment. A possible delay in yield ramp and learning is shown in FIGURE 1, for two cases (A and B) of defect learning and defect reduction in a manufacturing environment. Slower defect learning in the manufacturing environment not only translates to a higher cost of the manufactured chip but also results in the loss of competitive advantage as the chip products cannot be delivered in time. The difference OC in Figure 1 shows the cost disadvantage due to the yield loss while OD represents the competitive disadvantage due to delay in yield and time-to-market (TTM).
|FIGURE 1. The comparison of faster and slower defect learning on yield ramps and curves describing cost advantage and competitive advantage.|
SEMATECH has accelerated efforts to identify areas where particle performance can significantly affect yield learning in current and future manufacturing. By conducting multiple workshops with more than 70 companies (including major IDMS, foundries, OEMs, component and material suppliers), SEMATECH has identified major concerns and key focus areas. The defect performance of application-specific seals and valves, organic and molecular contamination, insufficient material and chemical filtration, defectivity and damage due to e-chuck, pump issues, and cleaning and packaging of components were some of the critical areas identified.
|FIGURE 2. Defect performance of a valve evaluated by cycling 5000 times each in three different experiments. The size distribution test of the particle shows higher number of particles below 80 nm of composition like Al and C.|
An example issue evaluated by using specialized test stands is shown in FIGURE 2. A valve and seal component was cycled 5,000 times per experiment. The initial cycles (Experiment 1) show a very high number of particles generated due to new component issues such as cleaning and packaging. Later, (in Experiment 2 and 3) the defect numbers per cycle were stabilized. The inspection map shows a signature of defects generated where the blade of the valve closes. It should be noted that the performance of this component was acceptable for particles above 100nm size specification while the defect performance will fail if critical defect size scales down to 50nm.
|FIGURE 3. The defect performance of substrate transfer in a deposition system compared for robotic handling and substrate clamping.|
In a similar example, the defect performance of substrate transfer in a deposition system is studied for three different cases: adder defects with electrostatic chuck clamp, without clamping and repeated handling by robotics (FIGURE 3). A very high number of defects at a lower size distribution were found for substrates after clamping while the difference in defect performance at larger size distribution was comparable for three cases.
During the workshops, many industry representatives, from both OEMs and component suppliers, highlighted that insufficient progress in fundamental research in defect generation and transport, and lack of infrastructure to test or evaluate particle performance, may lead to a scenario where the industry is ill-equipped to meet the defectivity specifications. SEMATECH is taking the initiative to aid the supply chain ecosystem by providing the required infrastructure and expertise through the Nanodefect Center (NDC). The NDC has built on more than a decade of expertise and infrastructure developed by SEMATECH to tackle the big challenges in particle detection, characterization and mitigation for critical supply chain components and materials. An example of such unique capabilities at SEMATECH is shown in FIGURE 4 where a sub-20nm particle on substrate buried beneath deposition layers was detected, characterized for compositional analysis and later traced back to determine the defect source.
|FIGURE 4. The inspection, detection and failure analysis of sub 20 nm defect of substrate buried beneath deposition layers. (a) TEM micrograph of defect on substrate buried beneath deposition layers. (b) EDS in TEM determining compositional analysis.|
The NDC offers the opportunity for different sectors of industry to conduct R&D using a common facility equipped with critical and expensive infrastructure to drive to the defect performance needed for components and materials. Sharing test facilities reduces the R&D costs and facilitates a closer supplier collaboration which is essential for the lateral and vertical integration needed in today's semiconductor industry. The center, in conjunction with SEMATECH's membership of chip manufacturers, will also develop roadmaps and key performance metrics for defectivity of critical components.
The NDC has already started to engage the supply chain in these key areas a) component development for defectivity performance for vacuum, plasma, and deposition applications, b) Evaluation and particle reduction for wet applications such as DI water, chemicals, resists, liquid filtration and surfaces after cleaning and c) sources and mitigation of molecular contamination and filtration. Multiple companies have engaged with the Nanodefect Center because they share SEMATECH's strategic vision that the roadmaps, key performance metrics and testing environments are critical to the future of the component and materials industry.
VIBHU JINDAL is managing projects at SEMATECH's Nanodefect Center on reducing defects in components and equipment. Previously, he was a Group Leader in SEMATECH's EUV Mask Blank Defect Reduction Program.
Solid State Technology | Volume 56 | Issue 3 | May 2013