Issue



Wafer bonding enables better LEDs


09/01/2012







Thomas Uhrmann


Thomas Uhrmann,

Business Development Manager,

EV Group (EVG).


In my discussions with LED manufacturers in different regions of the world, I have found that engineers are confronting similar challenges concerning wafer bonding, particularly in the processing of vertical LED (VLED) chips. VLEDs offer certain key advantages over their lateral LED counterparts, though the lateral approach is a simpler process.


Both LED designs begin with the epitaxial growth of GaN on a sapphire substrate. However, all subsequent processes differ. In a lateral LED design, the sapphire remains a part of the GaN LED stack. Since sapphire is a perfect insulator, both contacts to the LED diode structure must be formed at the topside of the LED die.


As a result, valuable device real estate is consumed by the electrical connections. Doing a simple back-of-the-envelope calculation of surface loss for a 4-inch LED wafer, assuming 300x300-??m die and 100x100-??m wire-bonding pads reveals that each diode contact, to p-doped and n-doped GaN, consumes about 10 percent of the wafer surface, which is quite significant.


In contrast, with VLEDs, GaN epitaxy is followed by full-wafer deposition of a metal-film stack followed by wafer bonding with a carrier substrate. Since one electrical contact is the bonding layer itself and hence buried inside the LED stack, manufacturers of VLEDs immediately save the aforementioned 10% of real estate. In addition, electrical injection is more efficient for VLEDs, where their lateral relatives have difficulties, especially when current density is increased.


However, optimizing the real estate and the electrical efficiency is only one aspect of the process: getting the light output from the LED remains the challenge. In GaN-based LEDs, the crystal planes of the GaN lead to a concentrated light emission normal to the sapphire???s c-plane, i.e., normal to the LED surface. In lateral LED designs, photons also couple into the transparent sapphire wafer so that light is also emitted from the LED???s sidewalls. Since losses are higher, efficiency is decreased.


To increase light output in VLEDs, a metallic mirror is deposited prior to the metal bonding layers, leading to the redirection of emitted light to the LED surface. Optimization of light extraction is further enabled by creating a resonant cavity in combination with surface roughening. In addition to improved light extraction efficiency, the light is well directed.


From a material standpoint, many eutectic metal systems (e.g. Au:Sn) or diffusion solders (e.g. Au:In) fulfill these requirements. However, each presents different processing requirements. The chosen metal system determines the bonding temperature. Because the sapphire substrate and the carrier substrates have quite different coefficients of thermal expansion, a metal system with low bonding temperature will keep strain at a more manageable level. The selection of these layers is beyond the scope of this article, but typically metal layers such as platinum, aluminium and gold and combinations of these materials are used.


Next, adhesion and diffusion barriers have to be chosen to contain the diffusive metals from the injection contacts or mirror layer of the LED structure. The correct choices will result in a high-yield layer transfer process.


The potential use of GaN-on-silicon in LED manufacturing is an exciting prospect that seems likely to come to fruition in the next several years. Companies are 2-3 years from entering mass production, with laboratory LED efficiencies comparable to LEDs on sapphire. With a silicon substrate, wafer bonding provides one of the enabling steps of transferring the LEDs after growth.


Note: Originally published in LEDs Magazine.


Solid State Technology, Volume 55, Issue 7, September 2012