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2D cross-sectional doping profiling study of advanced CMOS devices


07/19/2012







SHU QIN, ZHOUGUANG WANG, Y. JEFF HU and ALLEN McTEER, Micron Technology Inc., Boise, ID.


Electron holography (EH), a powerful method for two-dimensional (2D) doping profiling, was used to study 2D cross-sectional doping profiles of advanced CMOS devices.


Electron holography (EH) was used to investigate two-dimensional cross-sectional activated dopant (carrier) profiles of the CMOS device SD regions, which are formed by two doping techniques, conventional beam-line ion implant and plasma doping (PLAD). Comparisons and correlations among 2D EH doping profiles, 2D doping profile simulations [1], and 1D SIMS/ARXPS impurity (B or As) profiles [2] are extensively investigated and evaluated. Correlation between 2D doping profiles and device parameters is also extensively investigated.


The device structure is a standard self-aligned poly gate structure with a mask channel W/L ratio of 6400nm/80nm and a gate oxide thickness of 40??. Poly gates are 70nm in-situ phosphorus-doped poly-Si film for the NMOS device and counter-doped by B implant for the PMOS device. The raised source and drain regions were formed by an epitaxy process. SD spacer (nitride and oxide) was deposited by PECVD. PMOS device wafers were implanted by a conventional B beam-line ion implantation and a B2H6 PLAD process to form p+-type source and drain regions. The process conditions of the conventional B beam-line ion implantation are as follows: ion species is B+; energy is 2keV; dose is 5??1015/cm2; implant angle is 0??. The PLAD system is a pulsed, RF-excited continuous plasma-doping system, described in detail elsewhere [3].


The PLAD process conditions are as follows: the doping gas is B2H6, the nominal implant voltage and total dose are -6kV and 2??1016/cm2, respectively. NMOS device wafers were implanted by a conventional As beam-line ion implantation and an AsH3 PLAD process to form n+-type source and drain regions.


The process conditions of the conventional As beam-line ion implantation are as follows: ion species is As+; energy is 10keV; dose is 8??1015/cm2; implant angle is 0??. The PLAD process conditions are as follows: the doping gas is AsH3, the nominal implant voltage and total dose are -10kV and 1??1016/cm2, respectively. After SD implants, the implanted wafers were processed using standard strip/clean
apid thermal-annealing process (RTP) to remove the photoresist film and activate the impurities. Contacts were formed by a standard Ti silicide/W-based metallization. After device manufacturing was completed, electrical characterization was performed. The device wafers processed with both implant techniques were sent for two-dimensional (2D) cross-sectional doping profile measurements by the EH technique. Single-crystalline Si blanket-monitoring wafers were processed with the device wafers through the implant/PLAD under the same process conditions. Secondary ion mass spectrometry/angle-resolved x-ray electron spectroscopy (SIMS/ARXPS) method was used to measure the monitor wafers to find one-dimensional (vertical) as-implanted and annealed-retained impurity (B or As) profiles and doses in Si [2]. One-dimensional (vertical) impurity profiles in Si will be used to compare and correlate with 2D cross-sectional dopant profile results.


The cross-sectional TEM samples for electron holographic observations were prepared by focus ion beam (FIB) operating at 30keV. To obtain an uniform sample thickness, a sample piece was lifted out and milled from the back side (substrate side). All the samples were left thick enough (~300nm) to reduce the effect of surface dead layers and produce higher p-n junction signals. Electron holography experiments were performed on a JEOL 2010F TEM equipped with a field emission gun and an electron biprism at 200kV acceleration voltage. Digital objective and reference holograms were collected using a 1024??1024 Gatan multi-scan charge coupled devices (CCD). To get a proper field of view for the currently studied devices, a Gatan Image Filter (GIF) was used to obtain extra magnification and better signal-to-noise ratio. The hologram pairs were reconstructed using the Holoworks plug-in for Gatan DigitalMicrograph software.


In current work, the spatial resolution of the reconstructed electron holography images is estimated to be ~5-10nm, so the uncertainty of measurement from these images is ~5-10nm. The spatial resolution of electron holography is determined by the spacing of interference fringes in the recorded hologram, so it can be improved to be ~1nm by decreasing fringe spacing. In addition, it is hard to precisely determine the positions of spacer walls in the reconstructed holography images, which may induce some errors for the lateral xj(L) measurements.


PMOS devices


Fig. 1 shows transmission electron microscopy (TEM) and EH images of a PMOS device implanted by B beam-line implant with energy and dose of 2keV and 5??1015/cm2. The EH method yields quantitative junction depth data based on electron wave phase/potential profiles. Because the green color indicates negative potential which represents electrons and the red color indicates positive potential which represents holes in the active region of the Si substrate, the contour line of 0 potential defines p+n junctions. As shown in Fig.1, the lateral junction depth xj(L) = 40.9nm, vertical xj(V) = 100.6nm, and xj(L)/xj(V) ratio = 0.41. These junction depths are defined based on a combination of the TEM and EH images and process parameters.





Figure 1. TEM and electron holography images of a PMOS device implanted by B beam-line implant with an energy/B dose of 2keV/5??1015/cm2.



Fig. 2 shows TEM and electron holography images of a PMOS device implanted by B2H6 PLAD with voltage and total dose of -6kV and 2??1016/cm2. The lateral junction depth xj(L) = 46.1nm, vertical xj(V) = 110.7nm, and xj(L)/xj(V) ratio = 0.42. B2H6 PLAD shows slightly deeper of both lateral and vertical xj and with a slightly larger xj(L)/xj(V) ratio than the B beam-line implant.





Figure 2. TEM and electron holography images of a PMOS device implanted by B2H6 PLAD with a voltage/total dose of -6kV/2??1016/cm2.



Fig. 3 shows the final two-dimensional activated B profile of a PMOS device by process simulation [10] of B beam-line ion implant with energy/dose of 2keV/5??1015/cm2. The values of junction depth xj are defined as the active carrier compensation, that is, hole concentration equal to electron concentration. The simulated lateral junction depth xj(L) = 50.0nm, vertical xj(V) = 100.0nm, and xj(L)/xj(V) ratio = 0.50. 2D simulation results show very good consistence on xj(V), and slightly deeper xj(L) than 2D EH results because it is more difficult for 2D EH measurement to define the lateral dimensions from such complicated lateral structures. There is no simulation for the PLAD process due to a lack of a PLAD dopant profile model.





Figure 3. PMOS device final 2D activated B profile simulation of B beam-line implant with an energy/dose of 2keV/5??1015/cm2.



Fig. 4 shows one-dimensional (vertical) SIMS profiles of B in the monitor Si wafers for B beam-line ion implant and B2H6 PLAD on annealed wafers. SIMS/ARXPS method was used to obtain an accurate B profile and dose in the silicon substrate [2]. SIMS measurement used O primary beam with energy of 1keV and normal incidence. As shown in Fig. 4, the B profile and dose components have been separated by the native oxide thickness, which is defined and decoupled by ARXPS measurement. The junction depth xj(V) are defined at 2??1018/cm3 background concentration. B2H6 PLAD with voltage/total dose of -6kV/2??1016/cm2 condition shows slightly deeper xj(V) than B beam-line implant with energy/B dose of 2keV/5??1015/cm2 condition, which is very consistent with 2D EH data. The slight discrepancy between 1D SIMS and EH data is a result of the different process steps between the blanket wafers for SIMS measurement and the real device wafers for 2D EH measurement.





Figure 4. One-dimensional (vertical) SIMS profiles of B in the monitor Si wafers for B beam-line ion implant and B2H6 PLAD on annealed wafers.



Table 1 shows comparison of B beam-line ion implant and B2H6 PLAD by different metrologies on vertical xj(V), lateral xj(L), and xj(L)/xj(V) ratios. The error bars of EH measurement data, caused by a combination of the image definitions and EH measurement error bar, are within 10%. The error bars of SIMS measurement data are within 5%.



Reasonable correlations among 2D EH doping profiles, 2D doping profile simulations, and 1D SIMS/ARXPS B profiles have been demonstrated. The discrepancy demonstrates the limits of the process simulations within the constrains of more complicated two-dimensional device structure and corresponding process steps. The results highlight that 2D process simulation cannot be implemented for PLAD process because of a lack of a PLAD doping model.





Figure 5. TEM and electron holography images of a NMOS device implanted by As beam-line implant with an energy/dose of 10keV/8??1015/cm2.



NMOS devices


Fig. 5 shows TEM and electron holography images of a NMOS device implanted by As beam-line implant with energy and dose of 10keV and 8??1015/cm2. Again, green color indicates negative potential which represents electrons and red color indicates positive potential which represents holes, the contour line of 0 potential defines n+p junctions. The lateral junction depth xj(L) = 42nm, vertical xj(V) = 80nm, and xj(L)/xj(V) ratio = 0.525. Fig. 6 shows TEM and electron holography images of a NMOS device implanted by AsH3 PLAD with voltage and total dose of -10kV and 1??1016/cm2. The lateral junction depth xj(L) = 48nm, vertical xj(V) = 82nm, and xj(L)/xj(V) ratio = 0.585. AsH3 PLAD shows slightly deeper lateral and vertical xj profiles, with a slightly larger xj(L)/xj(V) ratio than the As beam-line implant. It is noticed that in Figs. 5 and 6 there are p-type-like islands appeared near the corners of SD regions. They are EH measurement artifacts caused by the interface states of the SD spacers. It appears as an acceptor-like feature because PMOS device EH data in Figs. 1 and 2 show much less impact.





Figure 6. TEM and electron holography images of a NMOS device implanted by AsH3 PLAD with a voltage/total dose of -10kV/1??1016/cm2.






Figure 7. NMOS device final 2D activated As profile simulation of As beam-line implant with an energy/dose of 10keV/8??1015/cm2.



Fig. 7 shows final two-dimensional activated As profile of a NMOS device by process simulation [1] of As beam-line ion implant with energy/dose of 10keV/8??1015/cm2. The simulated lateral junction depth xj(L) = 48nm, vertical xj(V) = 95nm, and xj(L)/xj(V) ratio = 0.505. There is no simulation for PLAD process due to a lack of a PLAD dopant profile model. 2D simulation results show deeper of both lateral and vertical xj than 2D EH results.





Figure 8. One-dimensional (vertical) SIMS profiles of arsenic in the monitoring Si wafers for As beam-line ion implant and AsH3 PLAD on annealed wafers.



Fig. 8 shows one-dimensional (vertical) SIMS profiles of arsenic in the monitor Si wafers for As beam-line ion implant and AsH3 PLAD on annealed wafers. SIMS/ARXPS method was used to obtain an accurate As profile and dose in the silicon substrate. SIMS measurement used Cs primary beam with energy of 1keV and normal incidence. AsH3 PLAD with voltage/dose of -10kV/1??1016/cm2 and As beam-line ion implant with energy/dose of 10keV/8??1015/cm2 show very similar xj(V) on annealed wafers, and show fairly consistent (slightly shallower) xj from 2D EH data. The slight discrepancy between 1D SIMS and EH data is a result of the different process steps between the blanket wafers for SIMS measurement and the real device wafers for 2D EH measurement.



Table 2 shows comparison of As beam-line ion implant and AsH3 PLAD by different metrologies on vertical xj(V), lateral xj(L), and xj(L)/xj(V) ratios.


Reasonable correlations among 2D EH doping profiles, 2D doping profile simulation, and 1D SIMS/ARXPS As profiles have been demonstrated. The discrepancy between 2D simulations and 2D doping measurements is caused by two factors. One is because the simulation did not include an overetch process to form the SD contact window. The other factor is that the simulation modeling assumed a higher activation for As impurity [1]. However, the activation fraction of As under the current DT conditions is very low on the order of 34% [4]. The discrepancy also demonstrates the limits of the process simulations within the constraints of more complicated two-dimensional device structures and corresponding process steps. The results highlight that 2D process simulation cannot be implemented for the PLAD process because of the lack of a doping model.


Although two-dimensional doping profiles by different metrologies show evidence of discrepancy or error, there is a clear trend to demonstrate that PLAD results in slightly deeper lateral junction depths xj(L) and slightly larger xj(L)/xj(V) ratios than the beam-line counterpart under the current doping and annealing conditions. A slightly larger xj(L)/xj(V) ratio of PLAD can be explained by its greater impact on the lateral profiles. The unique properties of PLAD, including higher surface impurity concentration and stable and repeatable parallelism of the ion trajectory compared to the incident angle variations of the conventional beam-line ion implants result in the greater impact on the lateral profiles of PLAD. A slightly deeper lateral junction depth xj(L) will result in a shorter effective channel length (Leff) and cause a "hotter" short channel device, which will be indicated by a smaller device breakdown voltage (BVDS), smaller VT, and larger drive current (IDS) and off current (IOFF). However, short Leff effects, by definition, will have less impact on long channel devices.



To confirm the 2D doping profile measurement data, both PMOS and NMOS device electrical performance were extensively investigated and evaluated. Table 3 lists and compares electrical parameters for PMOS devices fabricated by B beam-line ion implant and B2H6 PLAD. Table 4 lists and compares electrical parameters for NMOS devices fabricated by As beam-line ion implant and AsH3 PLAD.



The diode breakdown voltages (BVDIO) of the devices, which are dominated by the vertical junction depths xj(V), show similar for the devices processed by beam-line implants and PLADs, although PMOS device processed by PLAD shows slightly larger BVDIO than that processed by beam-line implant. The BVDIO data show a very good correlation with xj(V) data of 2D EH and 1D SIMS measurements. However, the devices processed by PLADs show "hotter" than those processed by beam-line ion implants, including lower BVDS, lower VT, higher transconductance (KL), higher IDS, and higher IOFF. The "hotter" device performance is attributed to a shorter effective channel length Leff of the PLADs than beam-line implants under the current process conditions. As shown in the tables, IOFF is more sensitive to Leff because IOFF increases with decreasing Leff in an exponential function. A slightly larger xj(L)/xj(V) ratio of PLAD than Beam-line ion implant, and in turn, "hotter" device behavior confirm that PLAD shows more lateral impact on doping profile than beam-line ion implant. The electrical parameters of the long channel devices show little differences between beam-line implant and PLAD processed devices.


Conclusion


Electron holography, a powerful method for two-dimensional (2D) doping profiling, was used to study 2D cross-sectional doping profiles of advanced CMOS devices. The low energy high dose ion implantations were used to form source and drain (SD) regions of the advanced CMOS devices including conventional beam-line implant and plasma doping (PLAD). Good correlations among 2D EH dopant profiles, 2D dopant profile simulations, and 1D SIMS/ARXPS impurity (B or As) profiles have been demonstrated. Very good correlation between 2D electron holography doping profiles and device parameters has been demonstrated. It has been found that both p- and n-type PLADs show slightly deeper lateral junction depths xj(L) and with slightly larger xj(L)/xj(V) ratio than beam-line counterparts when keeping similar vertical junction depths xj(V) as beam-line counterparts. The findings increase the capability to predict the potential impact of process parameters and architecture changes that may be required to meet the performance needs of advanced CMOS devices.


Acknowledgement


Additional contributors of this work are: Wendy Morinville, Kent Zhuang, Xue-Feng Lin, Kari Noehring, Chantelle Krasinski, and Shifeng Lu for SIMS/ARXPS measurements; Jaydip Guha for 2D process simulations; and Rob Burke for the coordinating and technical assistance. Thanks to Drs. John Smythe and Kamal Karda for the technical review and corrections. All of them are with Micron, Boise, ID, USA.


References


1. Sentaurus Process Simulation (SYNOPSYS) - www.synopsys.com.


2. S. Qin, K. Zhuang, S. Lu, A. McTeer, W. Morinville, and K. Noehring, "SIMS/ARXPS ??? A New Technique of Retained Dopant Dose and Profile Measurement of Ultra-Low Energy Doping Processes", IEEE Trans. on Plasma Science, vol. 37, no. 1, pp. 139-145, January 2009.


3. S. Qin and A. McTeer, "Characterization and optimization of a plasma doping process using a pulsed RF-excited continuous B2H6 plasma system", Surface and Coatings Technology, Vol. 201, No. 15, pp.6759-6767, April 2007.


4. S. Qin, Y. J. Hu, A. McTeer, S. Prussin, J. Reyes, "Study of Carrier Mobility of Low-Energy High-Dose Ion Implantations", IEEE Trans. on Plasma Science, vol. 39, no. 1, pp. 587-592, January 2011.


SHU QIN, ZHOUGUANG WANG, Y. JEFF HU and ALLEN McTEER, Micron Technology Inc., Boise, ID.


Solid State Technology, Volume 55, Issue 6, July 2012


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