Issue



Interposer ecosystem examined


04/01/2012







Dr. Phil Garrou,

Contributing Editor


At the recent IMAPS Device Packaging Conference in Ft. McDowell, AZ, Solid State Technology's Insights from the Leading Edge (IFTLE) brought together a panel of manufacturers, users and market specialists to discuss the evolving 2.5D / 3D Infrastructure.


I was joined by Douglas Yu, Sr. Director of front end and back end technology development for TSMC; Jonathon Greenwood, Director of Packaging R&D at GlobalFoundries; Remi Yu, Deputy Division Director of UMC; Nick Kim, VP of electronic packaging technologies at Hynix; Rich Rice, Sr. VP of sales for ASE ; Ron Huemoeller, VP of Advanced 3D interconnect at Amkor; Matt Nowak, Sr. Director of Engineering at Qualcomm and Jan Vardaman, President of TechSearch Inc.


The panelists were unanimous in their descriptions of mainstream 3D packaging being represented by 5-8??m copper through-silicon-via (TSV) middle on 50??m-thick silicon from integrated design manufacturers (IDMs) or foundries and interposers as 10??m Cu TSV in 100??m-thick silicon. Vardaman points out that some larger "TSV-last" from the backside are, of course, also being used in image sensors, and other TSV variations are being seen in MEMS applications.


When discussing interposer sourcing, Amkor's Huemoeller indicated that only 3 players were close to being ready to deliver interposers of any kind: TSMC, UMC, and GlobalFoundries. While some in the audience were resolute in their conviction that only panel-size formats (i.e., flat panel glass or laminates) could deliver the economics necessary to make 2.5/3D packaging mainstream, the assembled experts agreed that while glass panels and even possibly advanced laminates presented interesting possibilities for low-cost future products, they currently cannot meet requirements and are in the earliest stages of R&D.


If we assume interposers will be divided into the categories of "coarse" and "fine," the infrastructure question becomes "Where will these interposers be coming from?" Fine interposers by definition (1??m l/s) will require front-end semiconductor manufacturing tools and thus will be restricted to today's IDM and foundries that have such capability in place.


While all the outsourced semiconductor assembly and test (OSAT) providers have redistribution layer (RDL) technology capable of fabricating "coarse" interposers, so far none of the major players ??? ASE, Amkor, SCP, SPIL ??? have announced that they are entering the interposer business. TSMC, UMC, and GlobalFoundries all indicated that they will be commercializing fine-featured interposers, although, as of yet, only TSMC and IBM have initiated small-volume product production.


Nowak indicated that interposers would add substantial cost and as such probably would not be a broadly accepted solution for low cost mobile products. In response, TSMC's Yu responded that the addition of an interposer added cost to the overall component, but that "...this [2.5D] solution also offers cost savings by reuse of IP and separating digital and analog circuitry and allowing partitioning of costly SoC," and that this could make it the lowest-cost solution.


Based on the positions of these experts, one can conclude that initial interposer supply will be so-called "fine featured" high-end product, which will be provided today by foundries/3D-active IDMs. While we can anticipate that there will be future products designed to take advantage of "coarse" interposers, and some of the initial fine interposers might be able to migrate to coarse interposers as they become available, we will, initially at least, be limited by the availability and cost of foundry-supplied interposers.


Solid State Technology, Volume 55, Issue 3, April 2012


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