Samsung tips 32-28nm HKMG plans


Samsung's announcement that it has completed testing of its 32nm high-k/metal gate architecture, ramping to volume possibly by year's end—and following quickly with a 28nm version—has the industry buzzing about a possible reshaping of leading-edge semiconductor foundry manufacturing.

Ana Hunter, VP foundry at Samsung Semiconductors, filled in some of the details for SST. The 32nm process is a gate-first HKMG structure based on the IBM-led Common Platform Alliance. An SoC application processor "designed for maximum testability"—the same one used for Samsung's 45nm low-power process, for an apples-to-apples comparison—showed improved dynamic power reduction by 30% and leakage power by 55% (thanks to things like power gating, multi-threshold voltages, multi-channel lengths and adaptive body biasing techniques). It incorporates an ARM 1176 core, with physical core library, cells, memory compilers, etc. designed by ARM. Also included is a Synopsys IP macro, plus other Samsung-designed IP basically used to qualify the ecosystem process; Samsung also is working with EDA partners (e.g. Synopsys, Cadence, Mentor) to make sure everything works with design kits and tools that its customers already use. Everything at 32nm HKMG can be migrated to 28nm, Hunter said; design rules are shrinkable with recharacterization and timing.

Gate-first HKMG is easier to implement as a transition from a traditional poly/SION structure, she explained. The construction of the gate and transistor remain the same, though the materials are different (i.e., a high-k gate oxide instead of oxynitride); a metal gate is inserted, and then poly on top of that—and the rest of the flow is "basically the same as previous generation structures." Gate-first also is "much simpler" to implement from a process migration standpoint in terms of IP implementation, and fewer restrictive design rules (gate-last requires CMP around the gate structure). "We can maintain 50% shrink from 45nm to 32nm because there's not as many restrictive design rules," Hunter said. This makes the process particularly good for mobile applications, as it's cost-effective and "very good on gate leakage—a >100× improvement from 45nm to 32nm."

After early process development with the CPA, Samsung installed the technology in its S line in Korea (where it also does LSI work), and completed qualification and reliability testing (e.g., wafer-level, package-level, 1000 hour stress testing) with materials manufactured on that line. Tape-out will be in the next few months, with prototyping and customer sampling in 2H10, and production in early 2011—possibly pulled into the very end of 2010. "The process is frozen," Hunter said; what remains is "getting yield up, getting more tools qualified, bringing up the manufacturability side of things." She also confirmed that the 28nm HKMG version "is still on schedule to be production-ready in 1H11." — J.M.

For analysts' take on Samsung's HKMG announcment, visit

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