Issue



Time to go labless for new product ramp-up


03/01/2010







Click to EnlargeMichel Villemain,
Presto Engineering Inc., San Jose, CA USA

The semiconductor industry outlook for the coming year points to positive growth — but are companies prepared to maximize critical and still-scarce resources to actively contribute to this upswing?

An engineering team can get its newest silicon working on the prototype application board. But how do you deal with getting it to production? If you follow the traditional industry model of trying to do it all in-house, will you have the right expertise and equipment at the ready to tackle the sure-to-surface design related issues? If you are accustomed to using a traditional outsourced analytical lab, will it have the skill set and equipment on-line to solve the problem? Welcome to the challenges of capitalizing on the rebounding semiconductor market in 2010.

New product ramp-up — from validating and characterizing first silicon to production (revenue) — has historically been handled on a high-priority failure-analysis (FA) basis. As with field returns or return material authorizations (RMAs), these issues have been treated as stand-alone analyses, either through the in-house FA lab or a specialized analytical lab that is remote from the process and requires only the sample itself for resolution. However, semiconductors today bring a wide variety of time-to-production and time-to-revenue challenges for new products, especially considering the general availability of RF/mixed-signal IP, chip-scale packages (CSP), low-k and high-k processes and the rapidly evolving through-silicon via (TSV) technology.

In addition to this high level of expertise in disparate technologies, successful and timely FA outcomes require the co-location of conventional FA equipment (LSM, LVP, TRE, e-Beam, AFM) and automated test equipment (SoC and analog mixed-signal/RF) for dynamic electrical analysis.

Fortunately, an evolving discipline of design analysis is occurring in response to these requirements. It is an outgrowth of product engineering that focuses on qualifying test patterns, implementing and debugging scan, measuring critical internal timing, identifying standby and leakage issues and determining the root cause of supply droop and signal-integrity defects.

Moreover, the semiconductor industry is ready to see a new foundry-like model emerge, supporting the transition to "labless" manufacturing just as the development of foundries fostered the emergence of fabless semiconductor companies. In order to succeed, participants in this space must generate enough value and ROI to expand and to reinvest. For semiconductor companies, outsourcing lab functions can provide a cost-effective and time-efficient complement to internal product engineering groups, particularly in new product ramp-up.

The establishment of an efficient network of FA labs to service the critical technical challenges of new product ramp-up has real value for fabless vendors targeting the rapidly evolving consumer and industrial electronic product segments. It also can provide an effective alternative for capex-restricted IDMs.

The speed with which new products can be brought to profitable yields is critical to most semiconductor business models; it controls time-to-market, which can create the opportunity to command premium prices and build market share. The ramp-up process will become even more complex in the coming years, requiring an array of tools and expertise that will be expensive to assemble and very challenging to manage efficiently. An outsourced organization that successfully addresses these needs can offer great value to manufacturers and product development organizations, enabling further growth for our industry.

Michel Villemain, CEO, Presto Engineering Inc., San Jose, CA USA; 408-434-1808;  michel.villemain@presto-eng.comwww.presto-eng.com

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